[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 36/47] tcg/s390: Use tcg_tbrel_diff
From: |
Richard Henderson |
Subject: |
[PULL 36/47] tcg/s390: Use tcg_tbrel_diff |
Date: |
Thu, 7 Jan 2021 10:14:37 -1000 |
Use tcg_tbrel_diff when we need a displacement to a label,
and with a NULL argument when we need the normalizing addend.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390/tcg-target.c.inc | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/tcg/s390/tcg-target.c.inc b/tcg/s390/tcg-target.c.inc
index 1444914428..e4c61fc014 100644
--- a/tcg/s390/tcg-target.c.inc
+++ b/tcg/s390/tcg-target.c.inc
@@ -630,7 +630,7 @@ static void tcg_out_movi_int(TCGContext *s, TCGType type,
TCGReg ret,
return;
}
} else if (USE_REG_TB && !in_prologue) {
- ptrdiff_t off = sval - (uintptr_t)s->code_gen_ptr;
+ ptrdiff_t off = tcg_tbrel_diff(s, (void *)sval);
if (off == sextract64(off, 0, 20)) {
/* This is certain to be an address within TB, and therefore
OFF will be negative; don't try RX_LA. */
@@ -655,7 +655,7 @@ static void tcg_out_movi_int(TCGContext *s, TCGType type,
TCGReg ret,
} else if (USE_REG_TB && !in_prologue) {
tcg_out_insn(s, RXY, LG, ret, TCG_REG_TB, TCG_REG_NONE, 0);
new_pool_label(s, sval, R_390_20, s->code_ptr - 2,
- -(intptr_t)s->code_gen_ptr);
+ tcg_tbrel_diff(s, NULL));
} else {
TCGReg base = ret ? ret : TCG_TMP0;
tcg_out_insn(s, RIL, LARL, base, 0);
@@ -746,7 +746,7 @@ static void tcg_out_ld_abs(TCGContext *s, TCGType type,
TCGReg dest, void *abs)
}
}
if (USE_REG_TB) {
- ptrdiff_t disp = abs - (void *)s->code_gen_ptr;
+ ptrdiff_t disp = tcg_tbrel_diff(s, abs);
if (disp == sextract64(disp, 0, 20)) {
tcg_out_ld(s, type, dest, TCG_REG_TB, disp);
return;
@@ -956,7 +956,7 @@ static void tgen_andi(TCGContext *s, TCGType type, TCGReg
dest, uint64_t val)
if (!maybe_out_small_movi(s, type, TCG_TMP0, val)) {
tcg_out_insn(s, RXY, NG, dest, TCG_REG_TB, TCG_REG_NONE, 0);
new_pool_label(s, val & valid, R_390_20, s->code_ptr - 2,
- -(intptr_t)s->code_gen_ptr);
+ tcg_tbrel_diff(s, NULL));
return;
}
} else {
@@ -1015,7 +1015,7 @@ static void tgen_ori(TCGContext *s, TCGType type, TCGReg
dest, uint64_t val)
} else if (USE_REG_TB) {
tcg_out_insn(s, RXY, OG, dest, TCG_REG_TB, TCG_REG_NONE, 0);
new_pool_label(s, val, R_390_20, s->code_ptr - 2,
- -(intptr_t)s->code_gen_ptr);
+ tcg_tbrel_diff(s, NULL));
} else {
/* Perform the OR via sequential modifications to the high and
low parts. Do this via recursion to handle 16-bit vs 32-bit
@@ -1050,7 +1050,7 @@ static void tgen_xori(TCGContext *s, TCGType type, TCGReg
dest, uint64_t val)
} else if (USE_REG_TB) {
tcg_out_insn(s, RXY, XG, dest, TCG_REG_TB, TCG_REG_NONE, 0);
new_pool_label(s, val, R_390_20, s->code_ptr - 2,
- -(intptr_t)s->code_gen_ptr);
+ tcg_tbrel_diff(s, NULL));
} else {
/* Perform the xor by parts. */
tcg_debug_assert(s390_facilities & FACILITY_EXT_IMM);
@@ -1108,12 +1108,12 @@ static int tgen_cmp(TCGContext *s, TCGType type,
TCGCond c, TCGReg r1,
op = (is_unsigned ? RXY_CLY : RXY_CY);
tcg_out_insn_RXY(s, op, r1, TCG_REG_TB, TCG_REG_NONE, 0);
new_pool_label(s, (uint32_t)c2, R_390_20, s->code_ptr - 2,
- 4 - (intptr_t)s->code_gen_ptr);
+ 4 - tcg_tbrel_diff(s, NULL));
} else {
op = (is_unsigned ? RXY_CLG : RXY_CG);
tcg_out_insn_RXY(s, op, r1, TCG_REG_TB, TCG_REG_NONE, 0);
new_pool_label(s, c2, R_390_20, s->code_ptr - 2,
- -(intptr_t)s->code_gen_ptr);
+ tcg_tbrel_diff(s, NULL));
}
goto exit;
} else {
--
2.25.1
- [PULL 19/47] tcg: Make tb arg to synchronize_from_tb const, (continued)
- [PULL 19/47] tcg: Make tb arg to synchronize_from_tb const, Richard Henderson, 2021/01/07
- [PULL 18/47] tcg: Make DisasContextBase.tb const, Richard Henderson, 2021/01/07
- [PULL 25/47] tcg/i386: Support split-wx code generation, Richard Henderson, 2021/01/07
- [PULL 23/47] accel/tcg: Support split-wx for darwin/iOS with vm_remap, Richard Henderson, 2021/01/07
- [PULL 24/47] tcg: Return the TB pointer from the rx region from exit_tb, Richard Henderson, 2021/01/07
- [PULL 21/47] tcg: Add --accel tcg,split-wx property, Richard Henderson, 2021/01/07
- [PULL 22/47] accel/tcg: Support split-wx for linux with memfd, Richard Henderson, 2021/01/07
- [PULL 27/47] tcg/aarch64: Support split-wx code generation, Richard Henderson, 2021/01/07
- [PULL 29/47] tcg/tci: Push const down through bytecode reading, Richard Henderson, 2021/01/07
- [PULL 32/47] tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB, Richard Henderson, 2021/01/07
- [PULL 36/47] tcg/s390: Use tcg_tbrel_diff,
Richard Henderson <=
- [PULL 20/47] tcg: Use Error with alloc_code_gen_buffer, Richard Henderson, 2021/01/07
- [PULL 33/47] tcg/ppc: Support split-wx code generation, Richard Henderson, 2021/01/07
- [PULL 37/47] tcg/s390: Support split-wx code generation, Richard Henderson, 2021/01/07
- [PULL 38/47] tcg/riscv: Fix branch range checks, Richard Henderson, 2021/01/07
- [PULL 34/47] tcg/sparc: Use tcg_tbrel_diff, Richard Henderson, 2021/01/07
- [PULL 45/47] tcg: Remove TCG_TARGET_SUPPORT_MIRROR, Richard Henderson, 2021/01/07
- [PULL 26/47] tcg/aarch64: Use B not BL for tcg_out_goto_long, Richard Henderson, 2021/01/07
- [PULL 41/47] accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd, Richard Henderson, 2021/01/07
- [PULL 30/47] tcg: Introduce tcg_tbrel_diff, Richard Henderson, 2021/01/07
- [PULL 28/47] disas: Push const down through host disassembly, Richard Henderson, 2021/01/07