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[PULL 03/66] target/mips/addr: Add translation helpers for KSEG1
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 03/66] target/mips/addr: Add translation helpers for KSEG1 |
Date: |
Thu, 7 Jan 2021 23:21:50 +0100 |
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
It's useful for bootloader to do I/O operations.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Message-Id: <20201215064507.30148-3-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/cpu.h | 2 ++
target/mips/addr.c | 10 ++++++++++
2 files changed, 12 insertions(+)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 0086f95ea2a..0c2d397e4a9 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1312,6 +1312,8 @@ uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t
addr);
uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
+uint64_t cpu_mips_kseg1_to_phys(void *opaque, uint64_t addr);
+uint64_t cpu_mips_phys_to_kseg1(void *opaque, uint64_t addr);
bool mips_um_ksegs_enabled(void);
void mips_um_ksegs_enable(void);
diff --git a/target/mips/addr.c b/target/mips/addr.c
index 27a6036c451..86f1c129c9f 100644
--- a/target/mips/addr.c
+++ b/target/mips/addr.c
@@ -40,6 +40,16 @@ uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque,
uint64_t addr)
return addr | 0x40000000ll;
}
+uint64_t cpu_mips_kseg1_to_phys(void *opaque, uint64_t addr)
+{
+ return addr & 0x1fffffffll;
+}
+
+uint64_t cpu_mips_phys_to_kseg1(void *opaque, uint64_t addr)
+{
+ return (addr & 0x1fffffffll) | 0xffffffffa0000000ll;
+}
+
bool mips_um_ksegs_enabled(void)
{
return mips_um_ksegs;
--
2.26.2
- [PULL 00/66] MIPS patches for 2021-01-07, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 01/66] target/mips: Add CP0 Config0 register definitions for MIPS3 ISA, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 02/66] target/mips: Replace CP0_Config0 magic values by proper definitions, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 03/66] target/mips/addr: Add translation helpers for KSEG1,
Philippe Mathieu-Daudé <=
- [PULL 04/66] target/mips/mips-defs: Remove USE_HOST_FLOAT_REGS comment, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 05/66] target/mips/mips-defs: Reorder CPU_MIPS5 definition, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 06/66] target/mips/mips-defs: Rename CPU_MIPSxx Release 1 as CPU_MIPSxxR1, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 07/66] target/mips/mips-defs: Introduce CPU_MIPS64 and cpu_type_is_64bit(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 08/66] hw/mips/boston: Check 64-bit support with cpu_type_is_64bit(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 09/66] target/mips/mips-defs: Use ISA_MIPS32 definition to check Release 1, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 10/66] target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 11/66] target/mips/mips-defs: Use ISA_MIPS32R3 definition to check Release 3, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 12/66] target/mips/mips-defs: Use ISA_MIPS32R5 definition to check Release 5, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 13/66] target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6, Philippe Mathieu-Daudé, 2021/01/07