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Re: [PULL 23/35] hw/intc: Rework Loongson LIOINTC
From: |
Peter Maydell |
Subject: |
Re: [PULL 23/35] hw/intc: Rework Loongson LIOINTC |
Date: |
Mon, 11 Jan 2021 10:35:01 +0000 |
On Mon, 11 Jan 2021 at 10:20, BALATON Zoltan <balaton@eik.bme.hu> wrote:
>
> On Mon, 11 Jan 2021, Jiaxun Yang wrote:
> > On Mon, Jan 11, 2021, at 8:36 AM, Huacai Chen wrote:
> >> I think R_END should be 0x60, Jiaxun, what do you think?
> >
> > U r right.
> > The manual is misleading.
>
> The R_END constant is also used in loongson_liointc_init() for the length
> of the memory region so you might want to revise that. If this is a 32 bit
> register then you should decide what R_END means? Is it the end of the
> memory region in which case the reg starts at R_END - 4 or is it the
> address of the last reg in which case the memory region ends at R_END + 4.
> From the above I think it's the address of the last reg so you'll probably
> need to add 4 in loongson_liointc_init() when creating the memory region.
Mmm, or check
(addr >= R_START && addr < (R_START + R_ISR_SIZE * NUM_CORES))
Side note: R_ISR_SIZE is 8, but the code makes both the
32-bit addresses you can read/write in that 8-byte range
behave the same way. Is that really what the hardware does ?
Or does it actually have 1 32-bit register per core, spaced
8 bytes apart ?
thanks
-- PMM
- [PULL 21/35] clock: Remove clock_get_ns(), (continued)
- [PULL 21/35] clock: Remove clock_get_ns(), Philippe Mathieu-Daudé, 2021/01/03
- [PULL 22/35] clock: Define and use new clock_display_freq(), Philippe Mathieu-Daudé, 2021/01/03
- [PULL 24/35] hw/mips: Implement fw_cfg_arch_key_name(), Philippe Mathieu-Daudé, 2021/01/03
- [PULL 23/35] hw/intc: Rework Loongson LIOINTC, Philippe Mathieu-Daudé, 2021/01/03
- Re: [PULL 23/35] hw/intc: Rework Loongson LIOINTC, Peter Maydell, 2021/01/10
- Re: [PULL 23/35] hw/intc: Rework Loongson LIOINTC, Philippe Mathieu-Daudé, 2021/01/10
- Re: [PULL 23/35] hw/intc: Rework Loongson LIOINTC, BALATON Zoltan, 2021/01/10
- Re: [PULL 23/35] hw/intc: Rework Loongson LIOINTC, Huacai Chen, 2021/01/10
- Re: [PULL 23/35] hw/intc: Rework Loongson LIOINTC, Jiaxun Yang, 2021/01/10
- Re: [PULL 23/35] hw/intc: Rework Loongson LIOINTC, BALATON Zoltan, 2021/01/11
- Re: [PULL 23/35] hw/intc: Rework Loongson LIOINTC,
Peter Maydell <=
- Re: [PULL 23/35] hw/intc: Rework Loongson LIOINTC, BALATON Zoltan, 2021/01/11
- Re: [PULL 23/35] hw/intc: Rework Loongson LIOINTC, Jiaxun Yang, 2021/01/11
[PULL 25/35] hw/mips: Add Loongson-3 boot parameter helpers, Philippe Mathieu-Daudé, 2021/01/03
[PULL 26/35] hw/mips: Add Loongson-3 machine support, Philippe Mathieu-Daudé, 2021/01/03
[PULL 27/35] docs/system: Update MIPS machine documentation, Philippe Mathieu-Daudé, 2021/01/03
[PULL 28/35] hw/mips: Make bootloader addresses unsigned, Philippe Mathieu-Daudé, 2021/01/03
[PULL 29/35] hw/mips/malta: Use address translation helper to calculate bootloader_run_addr, Philippe Mathieu-Daudé, 2021/01/03
[PULL 30/35] hw/mips: Use address translation helper to handle ENVP_ADDR, Philippe Mathieu-Daudé, 2021/01/03
[PULL 31/35] hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT, Philippe Mathieu-Daudé, 2021/01/03
[PULL 32/35] hw/mips/fuloong2e: Replace faulty documentation links, Philippe Mathieu-Daudé, 2021/01/03