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[RFC PATCH v6 07/11] hw/ssi: imx_spi: Rework imx_spi_write() to handle b
From: |
Philippe Mathieu-Daudé |
Subject: |
[RFC PATCH v6 07/11] hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled |
Date: |
Tue, 12 Jan 2021 19:35:25 +0100 |
When the block is disabled, only the ECSPI_CONREG register can
be modified. Setting the EN bit enabled the device, clearing it
"disables the block and resets the internal logic with the
exception of the ECSPI_CONREG" register.
Move the imx_spi_is_enabled() check earlier.
Ref: i.MX 6DQ Applications Processor Reference Manual (IMX6DQRM),
chapter 21.7.3: Control Register (ECSPIx_CONREG)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/ssi/imx_spi.c | 25 +++++++++++++++----------
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index 7ac9da0f1d2..801daa5cbfa 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -321,6 +321,20 @@ static void imx_spi_write(void *opaque, hwaddr offset,
uint64_t value,
trace_imx_spi_write(index, imx_spi_reg_name(index), value);
+ if (!imx_spi_is_enabled(s)) {
+ /* Block is disabled */
+ if (index != ECSPI_CONREG) {
+ /* Ignore access */
+ return;
+ }
+ s->regs[ECSPI_CONREG] = value;
+ if (value & ECSPI_CONREG_EN) {
+ /* Keep disabled */
+ return;
+ }
+ /* Enable the block */
+ imx_spi_reset(DEVICE(s));
+ }
switch (index) {
case ECSPI_RXDATA:
@@ -328,10 +342,7 @@ static void imx_spi_write(void *opaque, hwaddr offset,
uint64_t value,
TYPE_IMX_SPI, __func__);
break;
case ECSPI_TXDATA:
- if (!imx_spi_is_enabled(s)) {
- /* Ignore writes if device is disabled */
- break;
- } else if (fifo32_is_full(&s->tx_fifo)) {
+ if (fifo32_is_full(&s->tx_fifo)) {
/* Ignore writes if queue is full */
break;
}
@@ -357,12 +368,6 @@ static void imx_spi_write(void *opaque, hwaddr offset,
uint64_t value,
case ECSPI_CONREG:
s->regs[ECSPI_CONREG] = value;
- if (!imx_spi_is_enabled(s)) {
- /* device is disabled, so this is a reset */
- imx_spi_reset(DEVICE(s));
- return;
- }
-
if (imx_spi_channel_is_master(s)) {
uint32_t change_mask = s->regs[index] ^ value;
int i;
--
2.26.2
- Re: [RFC PATCH v6 02/11] hw/ssi: imx_spi: Remove pointless variable initialization, (continued)
- [RFC PATCH v6 03/11] hw/ssi: imx_spi: Convert some debug printf()s to trace events, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 04/11] hw/ssi: imx_spi: Reduce 'change_mask' variable scope, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 05/11] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 06/11] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 07/11] hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled,
Philippe Mathieu-Daudé <=
- [RFC PATCH v6 08/11] hw/ssi: imx_spi: Disable chip selects when controller is disabled, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 09/11] hw/ssi: imx_spi: Round up the burst length to be multiple of 8, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 10/11] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic, Philippe Mathieu-Daudé, 2021/01/12
- [RFC PATCH v6 11/11] hw/ssi: imx_spi: Correct tx and rx fifo endianness, Philippe Mathieu-Daudé, 2021/01/12
- Re: [RFC PATCH v6 00/11] hw/ssi: imx_spi: Fix various bugs in the imx_spi model, Bin Meng, 2021/01/12