Re: [PATCH 13/13] target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType

[Jiaxun Yang]

在 2021/1/28 下午10:41, Philippe Mathieu-Daudé 写道:
> get_seg_physical_address() calls CPUMIPSTLBContext::map_address()
> handlers passing a MMUAccessType type. Update the prototype
> handlers to take a MMUAccessType argument, as it is stricter than
> an integer.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

> ---
>   target/mips/internal.h   |  8 ++++----
>   target/mips/tlb_helper.c | 12 ++++++------
>   2 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/target/mips/internal.h b/target/mips/internal.h
> index 34915c275c4..99264b8bf6a 100644
> --- a/target/mips/internal.h
> +++ b/target/mips/internal.h
> @@ -111,7 +111,7 @@ struct CPUMIPSTLBContext {
>       uint32_t nb_tlb;
>       uint32_t tlb_in_use;
>       int (*map_address)(struct CPUMIPSState *env, hwaddr *physical, int *prot,
> -                       target_ulong address, int rw);
> +                       target_ulong address, MMUAccessType access_type);
>       void (*helper_tlbwi)(struct CPUMIPSState *env);
>       void (*helper_tlbwr)(struct CPUMIPSState *env);
>       void (*helper_tlbp)(struct CPUMIPSState *env);
> @@ -126,11 +126,11 @@ struct CPUMIPSTLBContext {
>   };
>   
>   int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
> -                       target_ulong address, int rw);
> +                       target_ulong address, MMUAccessType access_type);
>   int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
> -                          target_ulong address, int rw);
> +                          target_ulong address, MMUAccessType access_type);
>   int r4k_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
> -                    target_ulong address, int rw);
> +                    target_ulong address, MMUAccessType access_type);
>   void r4k_helper_tlbwi(CPUMIPSState *env);
>   void r4k_helper_tlbwr(CPUMIPSState *env);
>   void r4k_helper_tlbp(CPUMIPSState *env);
> diff --git a/target/mips/tlb_helper.c b/target/mips/tlb_helper.c
> index 14f5b1a0a9c..2dc8ecafc3b 100644
> --- a/target/mips/tlb_helper.c
> +++ b/target/mips/tlb_helper.c
> @@ -39,7 +39,7 @@ enum {
>   
>   /* no MMU emulation */
>   int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
> -                       target_ulong address, int rw)
> +                       target_ulong address, MMUAccessType access_type)
>   {
>       *physical = address;
>       *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
> @@ -48,7 +48,7 @@ int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, 
> int *prot,
>   
>   /* fixed mapping MMU emulation */
>   int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
> -                          target_ulong address, int rw)
> +                          target_ulong address, MMUAccessType access_type)
>   {
>       if (address <= (int32_t)0x7FFFFFFFUL) {
>           if (!(env->CP0_Status & (1 << CP0St_ERL))) {
> @@ -68,7 +68,7 @@ int fixed_mmu_map_address(CPUMIPSState *env, hwaddr 
> *physical, int *prot,
>   
>   /* MIPS32/MIPS64 R4000-style MMU emulation */
>   int r4k_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
> -                    target_ulong address, int rw)
> +                    target_ulong address, MMUAccessType access_type)
>   {
>       uint16_t ASID = env->CP0_EntryHi & env->CP0_EntryHi_ASID_mask;
>       uint32_t MMID = env->CP0_MemoryMapID;
> @@ -97,13 +97,13 @@ int r4k_map_address(CPUMIPSState *env, hwaddr *physical, 
> int *prot,
>               if (!(n ? tlb->V1 : tlb->V0)) {
>                   return TLBRET_INVALID;
>               }
> -            if (rw == MMU_INST_FETCH && (n ? tlb->XI1 : tlb->XI0)) {
> +            if (access_type == MMU_INST_FETCH && (n ? tlb->XI1 : tlb->XI0)) {
>                   return TLBRET_XI;
>               }
> -            if (rw == MMU_DATA_LOAD && (n ? tlb->RI1 : tlb->RI0)) {
> +            if (access_type == MMU_DATA_LOAD && (n ? tlb->RI1 : tlb->RI0)) {
>                   return TLBRET_RI;
>               }
> -            if (rw != MMU_DATA_STORE || (n ? tlb->D1 : tlb->D0)) {
> +            if (access_type != MMU_DATA_STORE || (n ? tlb->D1 : tlb->D0)) {
>                   *physical = tlb->PFN[n] | (address & (mask >> 1));
>                   *prot = PAGE_READ;
>                   if (n ? tlb->D1 : tlb->D0) {