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Re: [PATCH 4/6] accel/tcg: Declare missing cpu_loop_exit*() stubs
From: |
Alex Bennée |
Subject: |
Re: [PATCH 4/6] accel/tcg: Declare missing cpu_loop_exit*() stubs |
Date: |
Mon, 15 Feb 2021 12:01:02 +0000 |
User-agent: |
mu4e 1.5.8; emacs 28.0.50 |
Claudio Fontana <cfontana@suse.de> writes:
> On 1/18/21 10:39 AM, Philippe Mathieu-Daudé wrote:
>> On 1/18/21 10:29 AM, Claudio Fontana wrote:
>>> On 1/17/21 5:48 PM, Philippe Mathieu-Daudé wrote:
>>>> cpu_loop_exit*() functions are declared in accel/tcg/cpu-exec-common.c,
>>>> and are not available when TCG accelerator is not built. Add stubs so
>>>> linking without TCG succeed.
>>>
>>> The reason why stubs are needed here at all seems to be that that the code
>>> calling cpu_loop_exit is not refactored properly yet;
>>
>> I agree ...
>>
>>> if we look at the example of i386, after the refactoring moving tcg related
>>> code into target/i386/tcg/,
>>> (and really even before that I think),
>>> the code calling cpu_loop_exit is not built for non-TCG at all, and so we
>>> don't need stubs.
>>>
>>> I am ok with this anyway, just wanted to convey that I think we should look
>>> at stubs as a necessary evil until all code stops mixing tcg, kvm and other
>>> accels...
>>>
>>> Thanks,
>>>
>>> Claudio
>>>
>>>>
>>>> Problematic files:
>>>>
>>>> - hw/semihosting/console.c in qemu_semihosting_console_inc()
>>>> - hw/ppc/spapr_hcall.c in h_confer()
>>>> - hw/s390x/ipl.c in s390_ipl_reset_request()
>>>> - hw/misc/mips_itu.c
>>
>> ... but I have no clue how to refactore these, as they
>> are used in both KVM and TCG.
>>
>> How would you do? I'm stuck with the semihosting code
>> dependency on ARM since 2 years...
>>
>> Phil.
>>
>
> Just naively looking at this, qemu_semihosting_console_inc seems called only
> by
> do_arm_semihosting in target/arm/arm-semi.c,
>
> which in turn is called by linux-user (TCG),
>
> target/arm/m_helper.c in arm_v7m_cpu_do_interrupt(),
> which I would assume is TCG only too, just waiting for the TCG/KVM
> refactoring in ARM, which I would assume would make cpu_tcg.c TCG-only,
>
> target/arm/helper.c in handle_semihosting, which is already wrapped in #ifdef
> CONFIG_TCG and is commented with:
>
> "
> * We only see semihosting exceptions in TCG only as they are not
>
> * trapped to the hypervisor in KVM.
>
> */
> "
>
> So am I wrong in my assumption that as soon as we are able to separate
> TCG vs KVM in target/arm/ , the issue of hw/semihosting/console.c
> would be solved?
I think it is - certainly for ARM. I don't know if real RiscV HW can
trap semihosting calls to the kernel/hypervisor.
--
Alex Bennée
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