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[PATCH v4 54/71] tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm}
From: |
Richard Henderson |
Subject: |
[PATCH v4 54/71] tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm} |
Date: |
Wed, 17 Feb 2021 12:20:19 -0800 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tci/tcg-target.c.inc | 70 ++++++++++++++++++++++++++++++----------
1 file changed, 53 insertions(+), 17 deletions(-)
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index fb4aacaca3..f93772f01f 100644
--- a/tcg/tci/tcg-target.c.inc
+++ b/tcg/tci/tcg-target.c.inc
@@ -314,6 +314,19 @@ static void tcg_out_op_rr(TCGContext *s, TCGOpcode op,
TCGReg r0, TCGReg r1)
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
+static void tcg_out_op_rrm(TCGContext *s, TCGOpcode op,
+ TCGReg r0, TCGReg r1, TCGArg m2)
+{
+ uint8_t *old_code_ptr = s->code_ptr;
+
+ tcg_out_op_t(s, op);
+ tcg_out_r(s, r0);
+ tcg_out_r(s, r1);
+ tcg_out32(s, m2);
+
+ old_code_ptr[1] = s->code_ptr - old_code_ptr;
+}
+
static void tcg_out_op_rrr(TCGContext *s, TCGOpcode op,
TCGReg r0, TCGReg r1, TCGReg r2)
{
@@ -369,6 +382,20 @@ static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode op,
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
+static void tcg_out_op_rrrm(TCGContext *s, TCGOpcode op,
+ TCGReg r0, TCGReg r1, TCGReg r2, TCGArg m3)
+{
+ uint8_t *old_code_ptr = s->code_ptr;
+
+ tcg_out_op_t(s, op);
+ tcg_out_r(s, r0);
+ tcg_out_r(s, r1);
+ tcg_out_r(s, r2);
+ tcg_out32(s, m3);
+
+ old_code_ptr[1] = s->code_ptr - old_code_ptr;
+}
+
static void tcg_out_op_rrrbb(TCGContext *s, TCGOpcode op, TCGReg r0,
TCGReg r1, TCGReg r2, uint8_t b3, uint8_t b4)
{
@@ -384,6 +411,21 @@ static void tcg_out_op_rrrbb(TCGContext *s, TCGOpcode op,
TCGReg r0,
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
+static void tcg_out_op_rrrrm(TCGContext *s, TCGOpcode op, TCGReg r0,
+ TCGReg r1, TCGReg r2, TCGReg r3, TCGArg m4)
+{
+ uint8_t *old_code_ptr = s->code_ptr;
+
+ tcg_out_op_t(s, op);
+ tcg_out_r(s, r0);
+ tcg_out_r(s, r1);
+ tcg_out_r(s, r2);
+ tcg_out_r(s, r3);
+ tcg_out32(s, m4);
+
+ old_code_ptr[1] = s->code_ptr - old_code_ptr;
+}
+
#if TCG_TARGET_REG_BITS == 32
static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode op,
TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3)
@@ -663,29 +705,23 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
const TCGArg *args,
case INDEX_op_qemu_ld_i32:
case INDEX_op_qemu_st_i32:
- tcg_out_op_t(s, opc);
- tcg_out_r(s, *args++);
- tcg_out_r(s, *args++);
- if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) {
- tcg_out_r(s, *args++);
+ if (TARGET_LONG_BITS <= TCG_TARGET_REG_BITS) {
+ tcg_out_op_rrm(s, opc, args[0], args[1], args[2]);
+ } else {
+ tcg_out_op_rrrm(s, opc, args[0], args[1], args[2], args[3]);
}
- tcg_out32(s, *args++);
- old_code_ptr[1] = s->code_ptr - old_code_ptr;
break;
case INDEX_op_qemu_ld_i64:
case INDEX_op_qemu_st_i64:
- tcg_out_op_t(s, opc);
- tcg_out_r(s, *args++);
- if (TCG_TARGET_REG_BITS == 32) {
- tcg_out_r(s, *args++);
+ if (TCG_TARGET_REG_BITS == 64) {
+ tcg_out_op_rrm(s, opc, args[0], args[1], args[2]);
+ } else if (TARGET_LONG_BITS <= TCG_TARGET_REG_BITS) {
+ tcg_out_op_rrrm(s, opc, args[0], args[1], args[2], args[3]);
+ } else {
+ tcg_out_op_rrrrm(s, opc, args[0], args[1],
+ args[2], args[3], args[4]);
}
- tcg_out_r(s, *args++);
- if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) {
- tcg_out_r(s, *args++);
- }
- tcg_out32(s, *args++);
- old_code_ptr[1] = s->code_ptr - old_code_ptr;
break;
case INDEX_op_mb:
--
2.25.1
- [PATCH v4 44/71] tcg/tci: Split out tcg_out_op_p, (continued)
- [PATCH v4 44/71] tcg/tci: Split out tcg_out_op_p, Richard Henderson, 2021/02/17
- [PATCH v4 45/71] tcg/tci: Split out tcg_out_op_rr, Richard Henderson, 2021/02/17
- [PATCH v4 46/71] tcg/tci: Split out tcg_out_op_rrr, Richard Henderson, 2021/02/17
- [PATCH v4 47/71] tcg/tci: Split out tcg_out_op_rrrc, Richard Henderson, 2021/02/17
- [PATCH v4 48/71] tcg/tci: Split out tcg_out_op_rrrrrc, Richard Henderson, 2021/02/17
- [PATCH v4 49/71] tcg/tci: Split out tcg_out_op_rrrbb, Richard Henderson, 2021/02/17
- [PATCH v4 50/71] tcg/tci: Split out tcg_out_op_rrcl, Richard Henderson, 2021/02/17
- [PATCH v4 51/71] tcg/tci: Split out tcg_out_op_rrrrrr, Richard Henderson, 2021/02/17
- [PATCH v4 52/71] tcg/tci: Split out tcg_out_op_rrrr, Richard Henderson, 2021/02/17
- [PATCH v4 53/71] tcg/tci: Split out tcg_out_op_rrrrcl, Richard Henderson, 2021/02/17
- [PATCH v4 54/71] tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm},
Richard Henderson <=
- [PATCH v4 55/71] tcg/tci: Split out tcg_out_op_v, Richard Henderson, 2021/02/17
- [PATCH v4 56/71] tcg/tci: Split out tcg_out_op_np, Richard Henderson, 2021/02/17
- [PATCH v4 57/71] tcg/tci: Split out tcg_out_op_r[iI], Richard Henderson, 2021/02/17
- [PATCH v4 58/71] tcg/tci: Reserve r13 for a temporary, Richard Henderson, 2021/02/17
- [PATCH v4 60/71] tcg/tci: Remove tci_write_reg, Richard Henderson, 2021/02/17
- [PATCH v4 59/71] tcg/tci: Emit setcond before brcond, Richard Henderson, 2021/02/17
- [PATCH v4 62/71] tcg/tci: Implement goto_ptr, Richard Henderson, 2021/02/17
- [PATCH v4 64/71] tcg/tci: Implement andc, orc, eqv, nand, nor, Richard Henderson, 2021/02/17
- [PATCH v4 63/71] tcg/tci: Implement movcond, Richard Henderson, 2021/02/17
- [PATCH v4 68/71] tcg/tci: Implement add2, sub2, Richard Henderson, 2021/02/17