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[PULL 14/43] target/mips: Replace magic value by MMU_DATA_LOAD definitio
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 14/43] target/mips: Replace magic value by MMU_DATA_LOAD definition |
Date: |
Sun, 21 Feb 2021 15:34:03 +0100 |
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20210128144125.3696119-7-f4bug@amsat.org>
---
target/mips/op_helper.c | 2 +-
target/mips/tlb_helper.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 89c7d4556a0..9fce0194b3e 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -312,7 +312,7 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong
arg, int mem_idx) \
} \
do_raise_exception(env, EXCP_AdEL, GETPC()); \
} \
- env->CP0_LLAddr = do_translate_address(env, arg, 0, GETPC()); \
+ env->CP0_LLAddr = do_translate_address(env, arg, MMU_DATA_LOAD, GETPC()); \
env->lladdr = arg; \
env->llval = do_cast cpu_##insn##_mmuidx_ra(env, arg, mem_idx, GETPC()); \
return env->llval; \
diff --git a/target/mips/tlb_helper.c b/target/mips/tlb_helper.c
index c9535b7f72f..9216c7a91b3 100644
--- a/target/mips/tlb_helper.c
+++ b/target/mips/tlb_helper.c
@@ -492,7 +492,7 @@ hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr
addr)
hwaddr phys_addr;
int prot;
- if (get_physical_address(env, &phys_addr, &prot, addr, 0,
+ if (get_physical_address(env, &phys_addr, &prot, addr, MMU_DATA_LOAD,
cpu_mmu_index(env, false)) != 0) {
return -1;
}
--
2.26.2
- [PULL 05/43] hw/mips/boston: Use bootloader helper to set GCRs, (continued)
- [PULL 05/43] hw/mips/boston: Use bootloader helper to set GCRs, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 06/43] hw/intc/loongson_liointc: Fix per core ISR handling, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 07/43] tests/acceptance: Test PMON with Loongson-3A1000 CPU, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 08/43] target/mips: fetch code with translator_ld, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 04/43] hw/mips/boston: Use bl_gen_kernel_jump to generate bootloaders, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 09/43] target/mips: Remove access_type argument from map_address() handler, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 10/43] target/mips: Remove access_type argument from get_seg_physical_address, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 11/43] target/mips: Remove access_type arg from get_segctl_physical_address(), Philippe Mathieu-Daudé, 2021/02/21
- [PULL 12/43] target/mips: Remove access_type argument from get_physical_address(), Philippe Mathieu-Daudé, 2021/02/21
- [PULL 13/43] target/mips: Remove unused MMU definitions, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 14/43] target/mips: Replace magic value by MMU_DATA_LOAD definition,
Philippe Mathieu-Daudé <=
- [PULL 15/43] target/mips: Let do_translate_address() take MMUAccessType argument, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 16/43] target/mips: Let cpu_mips_translate_address() take MMUAccessType arg, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 17/43] target/mips: Let raise_mmu_exception() take MMUAccessType argument, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 18/43] target/mips: Let get_physical_address() take MMUAccessType argument, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 19/43] target/mips: Let get_seg*_physical_address() take MMUAccessType arg, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 20/43] target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 21/43] target/mips: Remove unused 'rw' argument from page_table_walk_refill(), Philippe Mathieu-Daudé, 2021/02/21
- [PULL 22/43] target/mips: Include missing "tcg/tcg.h" header, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 23/43] target/mips: Make cpu_HI/LO registers public, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 25/43] target/mips: Rename 128-bit upper halve GPR registers, Philippe Mathieu-Daudé, 2021/02/21