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Re: [PATCH v2 1/5] target/riscv: Convert the RISC-V exceptions to an enu


From: Richard Henderson
Subject: Re: [PATCH v2 1/5] target/riscv: Convert the RISC-V exceptions to an enum
Date: Fri, 2 Apr 2021 10:11:37 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1

On 4/1/21 8:17 AM, Alistair Francis wrote:
Signed-off-by: Alistair Francis<alistair.francis@wdc.com>
Reviewed-by: Bin Meng<bmeng.cn@gmail.com>
---
  target/riscv/cpu_bits.h   | 44 ++++++++++++++++++++-------------------
  target/riscv/cpu.c        |  2 +-
  target/riscv/cpu_helper.c |  4 ++--
  3 files changed, 26 insertions(+), 24 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



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