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From: | Richard Henderson |
Subject: | Re: [PATCH v2 01/21] Hexagon (target/hexagon) TCG generation cleanup |
Date: | Fri, 2 Apr 2021 13:00:27 -0700 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 |
On 4/2/21 12:42 PM, Taylor Simpson wrote:
@@ -43,12 +42,17 @@ static inline void gen_log_predicated_reg_write(int
...
Having looked forward at patch 5, it appears this could be further improved by examining ctx->regs_written.It's not obvious how. This is for a predicated instruction (e.g., if (p0) r2 = add(r1, r0)), so the checks need to be made at runtime. There can be more than one predicated instruction in a packet that writes to the same register as long as only one of the predicates is true at runtime. Am I missing something?
Whoops, no. I misread where we were here. r~
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