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Re: [PATCH RFC] target/i386: Add Intel CPU model versions supporting 'xs
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From: |
Vitaly Kuznetsov |
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Subject: |
Re: [PATCH RFC] target/i386: Add Intel CPU model versions supporting 'xsaves' |
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Date: |
Thu, 08 Apr 2021 15:25:46 +0200 |
Wen Pu <puwen@hygon.cn> writes:
> On 2021/4/7 23:43, Vitaly Kuznetsov wrote:
>> Hyper-V 2016 refuses to boot on Skylake+ CPU models because they lack
>> 'xsaves'/'vmx-xsaves' features and this diverges from real hardware. The
>> same issue emerges with AMD "EPYC" CPU model prior to version 3 which got
>> 'xsaves' added. EPYC-Rome/EPYC-Milan CPU models have 'xsaves' enabled from
>> the very beginning so the comment blaming KVM to explain why Intel CPUs
>> lack 'xsaves' is likely outdated.
>>
>> Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
>> ---
>> The only CPU model where I keep the original comment and don't add
>> a version supporting 'xsaves' is "Hygon Dhyana" as I don't know much
>> about it.
>
> Hi Vitaly,
>
> Hygon Dhyana supports 'xsaves', could you please add a version supporting
> 'xsaves' for Hygon "Dhyana"?
>
Sure, will do! Thanks for the confirmation!
--
Vitaly