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[RFC v14 64/80] target/arm: restrict rebuild_hflags_a64 to TARGET_AARCH6
From: |
Claudio Fontana |
Subject: |
[RFC v14 64/80] target/arm: restrict rebuild_hflags_a64 to TARGET_AARCH64 |
Date: |
Fri, 16 Apr 2021 18:28:08 +0200 |
this work is in preparation of making sve_zcr_len_for_el AARCH64-only.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
target/arm/helper-a64.h | 2 ++
target/arm/helper.h | 1 -
target/arm/tcg/helper.c | 12 ++++++++++++
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index c139fa81f9..342f55d577 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -119,3 +119,5 @@ DEF_HELPER_FLAGS_2(st2g_stub, TCG_CALL_NO_WG, void, env,
i64)
DEF_HELPER_FLAGS_2(ldgm, TCG_CALL_NO_WG, i64, env, i64)
DEF_HELPER_FLAGS_3(stgm, TCG_CALL_NO_WG, void, env, i64, i64)
DEF_HELPER_FLAGS_3(stzgm_tags, TCG_CALL_NO_WG, void, env, i64, i64)
+
+DEF_HELPER_FLAGS_2(rebuild_hflags_a64, TCG_CALL_NO_RWG, void, env, int)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index ff8148ddc6..37dd9797a1 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -94,7 +94,6 @@ DEF_HELPER_FLAGS_1(rebuild_hflags_m32_newel, TCG_CALL_NO_RWG,
void, env)
DEF_HELPER_FLAGS_2(rebuild_hflags_m32, TCG_CALL_NO_RWG, void, env, int)
DEF_HELPER_FLAGS_1(rebuild_hflags_a32_newel, TCG_CALL_NO_RWG, void, env)
DEF_HELPER_FLAGS_2(rebuild_hflags_a32, TCG_CALL_NO_RWG, void, env, int)
-DEF_HELPER_FLAGS_2(rebuild_hflags_a64, TCG_CALL_NO_RWG, void, env, int)
DEF_HELPER_FLAGS_5(probe_access, TCG_CALL_NO_WG, void, env, tl, i32, i32, i32)
diff --git a/target/arm/tcg/helper.c b/target/arm/tcg/helper.c
index 8a0d59cbad..eb0fd394da 100644
--- a/target/arm/tcg/helper.c
+++ b/target/arm/tcg/helper.c
@@ -988,6 +988,8 @@ static uint32_t rebuild_hflags_a32(CPUARMState *env, int
fp_el,
return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags);
}
+#ifdef TARGET_AARCH64
+
static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
ARMMMUIdx mmu_idx)
{
@@ -1108,6 +1110,14 @@ static uint32_t rebuild_hflags_a64(CPUARMState *env, int
el, int fp_el,
return rebuild_hflags_common(env, fp_el, mmu_idx, flags);
}
+#else
+
+QEMU_ERROR("this should have been optimized away!")
+uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
+ ARMMMUIdx mmu_idx);
+
+#endif /* TARGET_AARCH64 */
+
static uint32_t rebuild_hflags_internal(CPUARMState *env)
{
int el = arm_current_el(env);
@@ -1168,6 +1178,7 @@ void HELPER(rebuild_hflags_a32)(CPUARMState *env, int el)
env->hflags = rebuild_hflags_a32(env, fp_el, mmu_idx);
}
+#ifdef TARGET_AARCH64
void HELPER(rebuild_hflags_a64)(CPUARMState *env, int el)
{
int fp_el = fp_exception_el(env, el);
@@ -1175,6 +1186,7 @@ void HELPER(rebuild_hflags_a64)(CPUARMState *env, int el)
env->hflags = rebuild_hflags_a64(env, el, fp_el, mmu_idx);
}
+#endif /* TARGET_AARCH64 */
static inline void assert_hflags_rebuild_correctly(CPUARMState *env)
{
--
2.26.2
- [RFC v14 41/80] target/arm: move cpu_tcg to tcg/tcg-cpu-models.c, (continued)
- [RFC v14 41/80] target/arm: move cpu_tcg to tcg/tcg-cpu-models.c, Claudio Fontana, 2021/04/16
- [RFC v14 46/80] target/arm: cleanup cpu includes, Claudio Fontana, 2021/04/16
- [RFC v14 44/80] target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/, Claudio Fontana, 2021/04/16
- [RFC v14 50/80] tests: restrict TCG-only arm-cpu-features tests to TCG builds, Claudio Fontana, 2021/04/16
- [RFC v14 54/80] Revert "target/arm: Restrict v8M IDAU to TCG", Claudio Fontana, 2021/04/16
- [RFC v14 52/80] tests: device-introspect-test: cope with ARM TCG-only devices, Claudio Fontana, 2021/04/16
- [RFC v14 55/80] target/arm: create kvm cpu accel class, Claudio Fontana, 2021/04/16
- [RFC v14 51/80] tests: do not run test-hmp on all machines for ARM KVM-only, Claudio Fontana, 2021/04/16
- [RFC v14 57/80] target/arm: add tcg cpu accel class, Claudio Fontana, 2021/04/16
- [RFC v14 58/80] target/arm: move TCG gt timer creation code in tcg/, Claudio Fontana, 2021/04/16
- [RFC v14 64/80] target/arm: restrict rebuild_hflags_a64 to TARGET_AARCH64,
Claudio Fontana <=
- [RFC v14 62/80] target/arm: cpu-sve: make cpu_sve_finalize_features return bool, Claudio Fontana, 2021/04/16
- [RFC v14 63/80] target/arm: make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64, Claudio Fontana, 2021/04/16
- [RFC v14 60/80] target/arm: cpu-sve: rename functions according to module prefix, Claudio Fontana, 2021/04/16
- [RFC v14 56/80] target/arm: move kvm post init initialization to kvm cpu accel, Claudio Fontana, 2021/04/16
- [RFC v14 61/80] target/arm: cpu-sve: split TCG and KVM functionality, Claudio Fontana, 2021/04/16
- [RFC v14 59/80] target/arm: cpu-sve: new module, Claudio Fontana, 2021/04/16
- [RFC v14 65/80] target/arm: arch_dump: restrict ELFCLASS64 to AArch64, Claudio Fontana, 2021/04/16
- [RFC v14 67/80] target/arm: tcg: restrict ZCR cpregs to TARGET_AARCH64, Claudio Fontana, 2021/04/16
- [RFC v14 71/80] cpu-sve: rename sve_zcr_len_for_el to cpu_sve_get_zcr_len_for_el, Claudio Fontana, 2021/04/16
- [RFC v14 66/80] target/arm: cpu-exceptions, cpu-exceptions-aa64: new modules, Claudio Fontana, 2021/04/16