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[PATCH v3 18/30] target/mips: Restrict cpu_mips_get_random() / update_pa
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v3 18/30] target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG |
Date: |
Mon, 19 Apr 2021 21:18:11 +0200 |
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/internal.h | 4 ----
target/mips/tcg/tcg-internal.h | 9 +++++++++
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/target/mips/internal.h b/target/mips/internal.h
index 5e9228db3f1..0bce0950b2c 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -165,7 +165,6 @@ void r4k_helper_tlbr(CPUMIPSState *env);
void r4k_helper_tlbinv(CPUMIPSState *env);
void r4k_helper_tlbinvf(CPUMIPSState *env);
void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
-uint32_t cpu_mips_get_random(CPUMIPSState *env);
void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
vaddr addr, unsigned size,
@@ -237,9 +236,6 @@ void cpu_mips_stop_count(CPUMIPSState *env);
/* helper.c */
void mmu_init(CPUMIPSState *env, const mips_def_t *def);
-/* op_helper.c */
-void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
-
static inline void mips_cpu_set_error_pc(CPUMIPSState *env,
target_ulong error_pc)
{
diff --git a/target/mips/tcg/tcg-internal.h b/target/mips/tcg/tcg-internal.h
index 24438667f47..b65580af211 100644
--- a/target/mips/tcg/tcg-internal.h
+++ b/target/mips/tcg/tcg-internal.h
@@ -11,10 +11,19 @@
#define MIPS_TCG_INTERNAL_H
#include "hw/core/cpu.h"
+#include "cpu.h"
void mips_cpu_do_interrupt(CPUState *cpu);
bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
+#if !defined(CONFIG_USER_ONLY)
+
+void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
+
+uint32_t cpu_mips_get_random(CPUMIPSState *env);
+
+#endif /* !CONFIG_USER_ONLY */
+
#endif
--
2.26.3
- [PATCH v3 09/30] target/mips: Merge do_translate_address into cpu_mips_translate_address, (continued)
- [PATCH v3 09/30] target/mips: Merge do_translate_address into cpu_mips_translate_address, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 10/30] target/mips: Extract load/store helpers to ldst_helper.c, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 11/30] meson: Introduce meson_user_arch source set for arch-specific user-mode, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 12/30] target/mips: Introduce tcg-internal.h for TCG specific declarations, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 13/30] target/mips: Add simple user-mode mips_cpu_do_interrupt(), Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 14/30] target/mips: Add simple user-mode mips_cpu_tlb_fill(), Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 15/30] target/mips: Move cpu_signal_handler definition around, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 16/30] target/mips: Move sysemu specific files under sysemu/ subfolder, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 17/30] target/mips: Move physical addressing code to sysemu/physaddr.c, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 18/30] target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG,
Philippe Mathieu-Daudé <=
- [PATCH v3 19/30] target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 20/30] target/mips: Restrict mmu_init() to TCG, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 21/30] target/mips: Move tlb_helper.c to tcg/sysemu/, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 22/30] target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 23/30] target/mips: Move Special opcodes to tcg/sysemu/special_helper.c, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 24/30] target/mips: Move helper_cache() to tcg/sysemu/special_helper.c, Philippe Mathieu-Daudé, 2021/04/19
- [PATCH v3 25/30] target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c, Philippe Mathieu-Daudé, 2021/04/19