Re: [PATCH v2] hw/riscv: Fix OT IBEX reset vector

[Alexander Wagner]

On 21.04.21 02:00, Alistair Francis wrote:
> On Tue, Apr 20, 2021 at 6:01 PM Alexander Wagner
> <alexander.wagner@ulal.de> wrote:
> > The IBEX documentation [1] specifies the reset vector to be "the most
> > significant 3 bytes of the boot address and the reset value (0x80) as
> > the least significant byte".
> >
> > [1] 
> > https://github.com/lowRISC/ibex/blob/master/doc/03_reference/exception_interrupts.rst
> >
> > Signed-off-by: Alexander Wagner <alexander.wagner@ulal.de>
> > Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> Thanks!
>
> Applied to riscv-to-apply.next

Perfect, thank you :)

Regards

Alex