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Re: [PATCH v3 0/6] hw/arm: xilinx_zynq: Fix upstream U-Boot boot failure
From: |
Edgar E. Iglesias |
Subject: |
Re: [PATCH v3 0/6] hw/arm: xilinx_zynq: Fix upstream U-Boot boot failure |
Date: |
Thu, 2 Sep 2021 07:39:58 +0200 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
On Wed, Sep 01, 2021 at 08:45:15PM +0800, Bin Meng wrote:
> As of today, when booting upstream U-Boot for Xilinx Zynq, the UART
> does not receive anything. Debugging shows that the UART input clock
> frequency is zero which prevents the UART from receiving anything as.
> per the logic in uart_receive().
>
> Note the U-Boot can still output data to the UART tx fifo, which should
> not happen, as the design seems to prevent the data transmission when
> clock is not enabled but somehow it only applies to the Rx side.
>
> For anyone who is interested to give a try, here is the U-Boot defconfig:
> $ make xilinx_zynq_virt_defconfig
>
> and QEMU commands to test U-Boot:
> $ qemu-system-arm -M xilinx-zynq-a9 -m 1G -display none -serial null -serial
> stdio \
> -device loader,file=u-boot-dtb.bin,addr=0x4000000,cpu-num=0
>
> Note U-Boot used to boot properly in QEMU 4.2.0 which is the QEMU
> version used in current U-Boot's CI testing. The UART clock changes
> were introduced by the following 3 commits:
>
> 38867cb7ec90 ("hw/misc/zynq_slcr: add clock generation for uarts")
> b636db306e06 ("hw/char/cadence_uart: add clock support")
> 5b49a34c6800 ("hw/arm/xilinx_zynq: connect uart clocks to slcr")
Thanks Bin,
On the entire series:
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
- [PATCH v3 1/6] hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase, (continued)
- [PATCH v3 1/6] hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase, Bin Meng, 2021/09/01
- [PATCH v3 2/6] hw/char: cadence_uart: Disable transmit when input clock is disabled, Bin Meng, 2021/09/01
- [PATCH v3 3/6] hw/char: cadence_uart: Move clock/reset check to uart_can_receive(), Bin Meng, 2021/09/01
- [PATCH v3 4/6] hw/char: cadence_uart: Convert to memop_with_attrs() ops, Bin Meng, 2021/09/01
- [PATCH v3 5/6] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}(), Bin Meng, 2021/09/01
- [PATCH v3 6/6] hw/char: cadence_uart: Log a guest error when device is unclocked or in reset, Bin Meng, 2021/09/01
- Re: [PATCH v3 0/6] hw/arm: xilinx_zynq: Fix upstream U-Boot boot failure,
Edgar E. Iglesias <=