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Re: [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked o
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From: |
Philippe Mathieu-Daudé |
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Subject: |
Re: [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read,write}() |
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Date: |
Thu, 2 Sep 2021 08:10:17 +0200 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
On 9/1/21 10:32 AM, Edgar E. Iglesias wrote:
> On Wed, Sep 01, 2021 at 11:27:24AM +0800, Bin Meng wrote:
>> Read or write to uart registers when unclocked or in reset should be
>> ignored. Add the check there, and as a result of this, the check in
>> uart_write_tx_fifo() is now unnecessary.
>
> Hi Bin,
>
> I thought I had replied to this but it must have gotten lost somewhere.
>
> We've got SW that expects FSBL (Bootlooader) to setup clocks and resets.
> It's quite common that users run that SW on QEMU without FSBL (FSBL typically
> requires the Xilinx tools installed). That's fine, since users can stil use
> -device loader to enable clocks etc.
>
> To help folks understand what's going, a log (guest-error) message would
> be helpful here. In particular with the serial port since things will go
> very quiet if they get things wrong.
Interesting, I was expecting this error to be reported by
memory_region_access_valid() but indeed it is not in the path.
Alternative is to implement MemoryRegionOps::accepts().