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[PATCH v6 2/4] hw/arm/smmuv3: Update CFGI commands to support non PCI/PC
From: |
chunming |
Subject: |
[PATCH v6 2/4] hw/arm/smmuv3: Update CFGI commands to support non PCI/PCIe devices |
Date: |
Thu, 2 Sep 2021 16:14:27 +0800 |
From: chunming <chunming.li@verisilicon.com>
"smmu_iommu_mr" function can't get MR according to SID for non PCI/PCIe
devices.
Look up in the platform device list: peri_sdev_list for non PCI/PCIe devices.
Signed-off-by: chunming <chunming.li@verisilicon.com>
---
hw/arm/smmuv3.c | 29 ++++++++++++++++++-----------
include/hw/arm/smmu-common.h | 5 ++++-
2 files changed, 22 insertions(+), 12 deletions(-)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 557d24ec6..615a6c904 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -985,14 +985,17 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
break;
}
- if (!mr) {
- break;
+ if (mr) {
+ trace_smmuv3_cmdq_cfgi_ste(sid);
+ sdev = container_of(mr, SMMUDevice, iommu);
+ smmuv3_flush_config(sdev);
}
- trace_smmuv3_cmdq_cfgi_ste(sid);
- sdev = container_of(mr, SMMUDevice, iommu);
- smmuv3_flush_config(sdev);
-
+ sdev = smmu_find_peri_sdev(bs, sid);
+ if (sdev) {
+ trace_smmuv3_cmdq_cfgi_ste(sid);
+ smmuv3_flush_config(sdev);
+ }
break;
}
case SMMU_CMD_CFGI_STE_RANGE: /* same as SMMU_CMD_CFGI_ALL */
@@ -1027,13 +1030,17 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
break;
}
- if (!mr) {
- break;
+ if (mr) {
+ trace_smmuv3_cmdq_cfgi_cd(sid);
+ sdev = container_of(mr, SMMUDevice, iommu);
+ smmuv3_flush_config(sdev);
}
- trace_smmuv3_cmdq_cfgi_cd(sid);
- sdev = container_of(mr, SMMUDevice, iommu);
- smmuv3_flush_config(sdev);
+ sdev = smmu_find_peri_sdev(bs, sid);
+ if (sdev) {
+ trace_smmuv3_cmdq_cfgi_cd(sid);
+ smmuv3_flush_config(sdev);
+ }
break;
}
case SMMU_CMD_TLBI_NH_ASID:
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
index 2902eb13c..be12b93c5 100644
--- a/include/hw/arm/smmu-common.h
+++ b/include/hw/arm/smmu-common.h
@@ -161,7 +161,10 @@ int smmu_ptw(SMMUTransCfg *cfg, dma_addr_t iova,
IOMMUAccessFlags perm,
*/
SMMUTransTableInfo *select_tt(SMMUTransCfg *cfg, dma_addr_t iova);
-/* Return the iommu mr associated to @sid, or NULL if none */
+/**
+ * Return the iommu mr associated to @sid, or NULL if none
+ * Only for PCI device, check smmu_find_peri_sdev for peripheral device
+ */
IOMMUMemoryRegion *smmu_iommu_mr(SMMUState *s, uint32_t sid);
#define SMMU_IOTLB_MAX_SIZE 256
--
2.30.2