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[PULL v4 07/43] target/i386: Added changed priority check for VIRQ
From: |
Paolo Bonzini |
Subject: |
[PULL v4 07/43] target/i386: Added changed priority check for VIRQ |
Date: |
Wed, 8 Sep 2021 12:03:50 +0200 |
From: Lara Lazier <laramglazier@gmail.com>
Writes to cr8 affect v_tpr. This could set or unset an interrupt
request as the priority might have changed.
Signed-off-by: Lara Lazier <laramglazier@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.h | 15 +++++++++++++++
target/i386/tcg/sysemu/misc_helper.c | 7 +++++++
target/i386/tcg/sysemu/svm_helper.c | 15 ---------------
3 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 24e8ec5273..6b09b8b62f 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2246,6 +2246,21 @@ static inline uint64_t cr4_reserved_bits(CPUX86State
*env)
return reserved_bits;
}
+static inline bool ctl_has_irq(CPUX86State *env)
+{
+ uint32_t int_prio;
+ uint32_t tpr;
+
+ int_prio = (env->int_ctl & V_INTR_PRIO_MASK) >> V_INTR_PRIO_SHIFT;
+ tpr = env->int_ctl & V_TPR_MASK;
+
+ if (env->int_ctl & V_IGN_TPR_MASK) {
+ return (env->int_ctl & V_IRQ_MASK);
+ }
+
+ return (env->int_ctl & V_IRQ_MASK) && (int_prio >= tpr);
+}
+
#if defined(TARGET_X86_64) && \
defined(CONFIG_USER_ONLY) && \
defined(CONFIG_LINUX)
diff --git a/target/i386/tcg/sysemu/misc_helper.c
b/target/i386/tcg/sysemu/misc_helper.c
index 91b0fc916b..9ccaa054c4 100644
--- a/target/i386/tcg/sysemu/misc_helper.c
+++ b/target/i386/tcg/sysemu/misc_helper.c
@@ -122,6 +122,13 @@ void helper_write_crN(CPUX86State *env, int reg,
target_ulong t0)
qemu_mutex_unlock_iothread();
}
env->int_ctl = (env->int_ctl & ~V_TPR_MASK) | (t0 & V_TPR_MASK);
+
+ CPUState *cs = env_cpu(env);
+ if (ctl_has_irq(env)) {
+ cpu_interrupt(cs, CPU_INTERRUPT_VIRQ);
+ } else {
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_VIRQ);
+ }
break;
default:
env->cr[reg] = t0;
diff --git a/target/i386/tcg/sysemu/svm_helper.c
b/target/i386/tcg/sysemu/svm_helper.c
index a35b79548a..7bbd3a18c9 100644
--- a/target/i386/tcg/sysemu/svm_helper.c
+++ b/target/i386/tcg/sysemu/svm_helper.c
@@ -76,21 +76,6 @@ static inline void svm_load_seg_cache(CPUX86State *env,
hwaddr addr,
sc->base, sc->limit, sc->flags);
}
-static inline bool ctl_has_irq(CPUX86State *env)
-{
- uint32_t int_prio;
- uint32_t tpr;
-
- int_prio = (env->int_ctl & V_INTR_PRIO_MASK) >> V_INTR_PRIO_SHIFT;
- tpr = env->int_ctl & V_TPR_MASK;
-
- if (env->int_ctl & V_IGN_TPR_MASK) {
- return env->int_ctl & V_IRQ_MASK;
- }
-
- return (env->int_ctl & V_IRQ_MASK) && (int_prio >= tpr);
-}
-
static inline bool is_efer_invalid_state (CPUX86State *env)
{
if (!(env->efer & MSR_EFER_SVME)) {
--
2.31.1
- [PULL v4 00/43] (Mostly) x86 changes for 2021-09-06, Paolo Bonzini, 2021/09/08
- [PULL v4 01/43] target/i386: add missing bits to CR4_RESERVED_MASK, Paolo Bonzini, 2021/09/08
- [PULL v4 02/43] target/i386: VMRUN and VMLOAD canonicalizations, Paolo Bonzini, 2021/09/08
- [PULL v4 03/43] target/i386: Added VGIF feature, Paolo Bonzini, 2021/09/08
- [PULL v4 05/43] target/i386: Added VGIF V_IRQ masking capability, Paolo Bonzini, 2021/09/08
- [PULL v4 09/43] memory: Add RAM_PROTECTED flag to skip IOMMU mappings, Paolo Bonzini, 2021/09/08
- [PULL v4 06/43] target/i386: Added ignore TPR check in ctl_has_irq, Paolo Bonzini, 2021/09/08
- [PULL v4 11/43] qom: Add memory-backend-epc ObjectOptions support, Paolo Bonzini, 2021/09/08
- [PULL v4 04/43] target/i386: Moved int_ctl into CPUX86State structure, Paolo Bonzini, 2021/09/08
- [PULL v4 07/43] target/i386: Added changed priority check for VIRQ,
Paolo Bonzini <=
- [PULL v4 08/43] target/i386: Added vVMLOAD and vVMSAVE feature, Paolo Bonzini, 2021/09/08
- [PULL v4 10/43] hostmem: Add hostmem-epc as a backend for SGX EPC, Paolo Bonzini, 2021/09/08
- [PULL v4 17/43] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX, Paolo Bonzini, 2021/09/08
- [PULL v4 14/43] i386: Add primary SGX CPUID and MSR defines, Paolo Bonzini, 2021/09/08
- [PULL v4 13/43] vl: Add sgx compound properties to expose SGX EPC sections to guest, Paolo Bonzini, 2021/09/08
- [PULL v4 18/43] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs, Paolo Bonzini, 2021/09/08
- [PULL v4 24/43] Adjust min CPUID level to 0x12 when SGX is enabled, Paolo Bonzini, 2021/09/08
- [PULL v4 12/43] i386: Add 'sgx-epc' device to expose EPC sections to guest, Paolo Bonzini, 2021/09/08