Re: [PATCH v2 2/3] qmp: Add the qmp_query_sgx_capabilities()

[Yang Zhong]

On Fri, Sep 10, 2021 at 02:41:08PM +0200, Philippe Mathieu-Daudé wrote:
> On 9/10/21 12:22 PM, Yang Zhong wrote:
> > Libvirt can use qmp_query_sgx_capabilities() to get the host
> > sgx capabilities to decide how to allocate SGX EPC size to VM.
> > 
> > Signed-off-by: Yang Zhong <yang.zhong@intel.com>
> > ---
> >  hw/i386/sgx.c              | 66 ++++++++++++++++++++++++++++++++++++++
> >  include/hw/i386/sgx.h      |  1 +
> >  qapi/misc-target.json      | 18 +++++++++++
> >  target/i386/monitor.c      |  5 +++
> >  tests/qtest/qmp-cmd-test.c |  1 +
> >  5 files changed, 91 insertions(+)
> > 
> > diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c
> > index 8a32d62d7e..1be2670c84 100644
> > --- a/hw/i386/sgx.c
> > +++ b/hw/i386/sgx.c
> > @@ -18,6 +18,72 @@
> >  #include "qapi/error.h"
> >  #include "exec/address-spaces.h"
> >  #include "hw/i386/sgx.h"
> > +#include "sysemu/hw_accel.h"
> > +
> > +#define SGX_MAX_EPC_SECTIONS            8
> > +#define SGX_CPUID_EPC_INVALID           0x0
> > +
> > +/* A valid EPC section. */
> > +#define SGX_CPUID_EPC_SECTION           0x1
> > +#define SGX_CPUID_EPC_MASK              0xF
> > +
> > +static uint64_t sgx_calc_section_metric(uint64_t low, uint64_t high)
> > +{
> > +    return (low & MAKE_64BIT_MASK(12, 31 - 12 + 1)) +
> > +           ((high & MAKE_64BIT_MASK(0, 19 - 0 + 1)) << 32);
> 
> Thanks for using MAKE_64BIT_MASK.
> 
> Can we have #definitions instead of these magic values please?
>

  Thanks, i will do the below definitions:

  /* The start bit of the EPC section */
  #define ECX_START                       12
  #define EDX_START                       0
  
  static uint64_t sgx_calc_section_metric(uint64_t low, uint64_t high)
  {
      return (low & MAKE_64BIT_MASK(ECX_START, 20)) +
             ((high & MAKE_64BIT_MASK(EDX_START, 20)) << 32);
  } 


  Yang

 
> > +}
> > +
> > +static uint64_t sgx_calc_host_epc_section_size(void)
> > +{
> > +    uint32_t i, type;
> > +    uint32_t eax, ebx, ecx, edx;
> > +    uint64_t size = 0;
> > +
> > +    for (i = 0; i < SGX_MAX_EPC_SECTIONS; i++) {
> > +        host_cpuid(0x12, i + 2, &eax, &ebx, &ecx, &edx);
> > +
> > +        type = eax & SGX_CPUID_EPC_MASK;
> > +        if (type == SGX_CPUID_EPC_INVALID) {
> > +            break;
> > +        }
> > +
> > +        if (type != SGX_CPUID_EPC_SECTION) {
> > +            break;
> > +        }
> > +
> > +        size += sgx_calc_section_metric(ecx, edx);
> > +    }
> > +
> > +    return size;
> > +}
> > +
> > +SGXInfo *sgx_get_capabilities(Error **errp)
> > +{
> > +    SGXInfo *info = NULL;
> > +    uint32_t eax, ebx, ecx, edx;
> > +
> > +    int fd = qemu_open_old("/dev/sgx_vepc", O_RDWR);
> > +    if (fd < 0) {
> > +        error_setg(errp, "SGX is not enabled in KVM");
> > +        return NULL;
> > +    }
> > +
> > +    info = g_new0(SGXInfo, 1);
> > +    host_cpuid(0x7, 0, &eax, &ebx, &ecx, &edx);
> > +
> > +    info->sgx = ebx & (1U << 2) ? true : false;
> > +    info->flc = ecx & (1U << 30) ? true : false;
> > +
> > +    host_cpuid(0x12, 0, &eax, &ebx, &ecx, &edx);
> > +    info->sgx1 = eax & (1U << 0) ? true : false;
> > +    info->sgx2 = eax & (1U << 1) ? true : false;
> > +
> > +    info->section_size = sgx_calc_host_epc_section_size();
> > +
> > +    close(fd);
> > +
> > +    return info;
> > +}