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[PULL 37/44] tcg/arm: Simplify use_armv5t_instructions
From: |
Richard Henderson |
Subject: |
[PULL 37/44] tcg/arm: Simplify use_armv5t_instructions |
Date: |
Mon, 13 Sep 2021 17:14:49 -0700 |
According to the Arm ARM DDI 0406C, section A1.3, the valid variants
are ARMv5T, ARMv5TE, ARMv5TEJ -- there is no ARMv5 without Thumb.
Therefore simplify the test from preprocessor ifdefs to base
architecture revision. Retain the "t" in the name to minimize churn.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/arm/tcg-target.h | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 18bb16c784..f41b809554 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -28,13 +28,7 @@
extern int arm_arch;
-#if defined(__ARM_ARCH_5T__) \
- || defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_5TEJ__)
-# define use_armv5t_instructions 1
-#else
-# define use_armv5t_instructions use_armv6_instructions
-#endif
-
+#define use_armv5t_instructions (__ARM_ARCH >= 5 || arm_arch >= 5)
#define use_armv6_instructions (__ARM_ARCH >= 6 || arm_arch >= 6)
#define use_armv7_instructions (__ARM_ARCH >= 7 || arm_arch >= 7)
--
2.25.1
- [PULL 30/44] target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu, (continued)
- [PULL 30/44] target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 23/44] target/nios2: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 19/44] target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder, Richard Henderson, 2021/09/13
- [PULL 12/44] target/xtensa: Restrict do_transaction_failed() to sysemu, Richard Henderson, 2021/09/13
- [PULL 35/44] tcg/arm: Remove fallback definition of __ARM_ARCH, Richard Henderson, 2021/09/13
- [PULL 38/44] tcg/arm: Support armv4t in tcg_out_goto and tcg_out_call, Richard Henderson, 2021/09/13
- [PULL 31/44] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu, Richard Henderson, 2021/09/13
- [PULL 34/44] accel/tcg/user-exec: Fix read-modify-write of code on s390 hosts, Richard Henderson, 2021/09/13
- [PULL 29/44] target/rx: Restrict cpu_exec_interrupt() handler to sysemu, Richard Henderson, 2021/09/13
- [PULL 37/44] tcg/arm: Simplify use_armv5t_instructions,
Richard Henderson <=
- [PULL 39/44] tcg/arm: Split out tcg_out_ldstm, Richard Henderson, 2021/09/13
- [PULL 36/44] tcg/arm: Standardize on tcg_out_<branch>_{reg,imm}, Richard Henderson, 2021/09/13
- [PULL 41/44] tcg/arm: Drop inline markers, Richard Henderson, 2021/09/13
- [PULL 43/44] tcg/arm: More use of the ARMInsn enum, Richard Henderson, 2021/09/13
- [PULL 40/44] tcg/arm: Simplify usage of encode_imm, Richard Henderson, 2021/09/13
- [PULL 44/44] tcg/arm: More use of the TCGReg enum, Richard Henderson, 2021/09/13
- [PULL 42/44] tcg/arm: Give enum arm_cond_code_e a typedef and use it, Richard Henderson, 2021/09/13
- Re: [PULL 00/44] tcg patch queue, v2, Peter Maydell, 2021/09/14