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RE: [PATCH v3 15/30] Hexagon HVX (target/hexagon) helper overrides - vec
From: |
Taylor Simpson |
Subject: |
RE: [PATCH v3 15/30] Hexagon HVX (target/hexagon) helper overrides - vector assign & cmov |
Date: |
Mon, 20 Sep 2021 22:11:30 +0000 |
> -----Original Message-----
> From: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> On
> Behalf Of Philippe Mathieu-Daudé
> Sent: Monday, September 20, 2021 4:59 PM
> To: Taylor Simpson <tsimpson@quicinc.com>; qemu-devel@nongnu.org
> Cc: ale@rev.ng; Brian Cain <bcain@quicinc.com>;
> richard.henderson@linaro.org
> Subject: Re: [PATCH v3 15/30] Hexagon HVX (target/hexagon) helper
> overrides - vector assign & cmov
>
> On 9/20/21 23:24, Taylor Simpson wrote:
> > Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
> > ---
> > target/hexagon/gen_tcg_hvx.h | 31
> +++++++++++++++++++++++++++++++
> > 1 file changed, 31 insertions(+)
> >
> > diff --git a/target/hexagon/gen_tcg_hvx.h
> > b/target/hexagon/gen_tcg_hvx.h index eb29566..bcd53d4 100644
> > --- a/target/hexagon/gen_tcg_hvx.h
> > +++ b/target/hexagon/gen_tcg_hvx.h
> > @@ -126,4 +126,35 @@ static inline void assert_vhist_tmp(DisasContext
> *ctx)
> > } while (0)
> >
> >
> > +#define fGEN_TCG_V6_vassign(SHORTCODE) \
> > + tcg_gen_gvec_mov(MO_64, VdV_off, VuV_off, \
> > + sizeof(MMVector), sizeof(MMVector))
> > +
> > +/* Vector conditional move */
> > +#define fGEN_TCG_VEC_CMOV(PRED) \
> > + do { \
> > + TCGv lsb = tcg_temp_new(); \
> > + TCGLabel *false_label = gen_new_label(); \
> > + TCGLabel *end_label = gen_new_label(); \
> > + tcg_gen_andi_tl(lsb, PsV, 1); \
> > + tcg_gen_brcondi_tl(TCG_COND_NE, lsb, PRED, false_label); \
> > + tcg_temp_free(lsb); \
> > + tcg_gen_gvec_mov(MO_64, VdV_off, VuV_off, \
> > + sizeof(MMVector), sizeof(MMVector)); \
> > + tcg_gen_br(end_label); \
> > + gen_set_label(false_label); \
> > + tcg_gen_ori_tl(hex_slot_cancelled, hex_slot_cancelled, \
> > + 1 << insn->slot); \
> > + gen_set_label(end_label); \
> > + } while (0)
>
> Why a macro and not a (eventually inlined) function?
I make these macros to be consistent across the different overrides. This one
could easily be a function, but others cannot. For example,
fGEN_TCG_VEC_CMP_OP can't - see patch 20/30.
Having said that, I can change only the ones that don't need to be macros into
functions if that is preferred.
Thanks,
Taylor
- [PATCH v3 26/30] Hexagon HVX (target/hexagon) import instruction encodings, (continued)
- [PATCH v3 26/30] Hexagon HVX (target/hexagon) import instruction encodings, Taylor Simpson, 2021/09/20
- [PATCH v3 02/30] Hexagon HVX (target/hexagon) add Hexagon Vector eXtensions (HVX) to core, Taylor Simpson, 2021/09/20
- [PATCH v3 16/30] Hexagon HVX (target/hexagon) helper overrides - vector add & sub, Taylor Simpson, 2021/09/20
- [PATCH v3 10/30] Hexagon HVX (target/hexagon) instruction utility functions, Taylor Simpson, 2021/09/20
- [PATCH v3 18/30] Hexagon HVX (target/hexagon) helper overrides - vector max/min, Taylor Simpson, 2021/09/20
- [PATCH v3 15/30] Hexagon HVX (target/hexagon) helper overrides - vector assign & cmov, Taylor Simpson, 2021/09/20
- [PATCH v3 19/30] Hexagon HVX (target/hexagon) helper overrides - vector logical ops, Taylor Simpson, 2021/09/20
- [PATCH v3 17/30] Hexagon HVX (target/hexagon) helper overrides - vector shifts, Taylor Simpson, 2021/09/20
- [PATCH v3 27/30] Hexagon HVX (tests/tcg/hexagon) vector_add_int test, Taylor Simpson, 2021/09/20
- [PATCH v3 28/30] Hexagon HVX (tests/tcg/hexagon) hvx_misc test, Taylor Simpson, 2021/09/20
- [PATCH v3 25/30] Hexagon HVX (target/hexagon) instruction decoding, Taylor Simpson, 2021/09/20
- [PATCH v3 21/30] Hexagon HVX (target/hexagon) helper overrides - vector splat and abs, Taylor Simpson, 2021/09/20