Re: [PULL 00/35] tcg patch queue

[Peter Maydell]

On Tue, 21 Sept 2021 at 10:41, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> On 9/21/21 11:28, Peter Maydell wrote:
> > On Mon, 20 Sept 2021 at 22:16, Philippe Mathieu-Daudé <f4bug@amsat.org> 
> > wrote:
> >> Forget this crap. The missing piece was:
> >>
> >> -- >8 --
> >> diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
> >> index 0d5adccf1a7..da348938407 100644
> >> --- a/target/arm/cpu_tcg.c
> >> +++ b/target/arm/cpu_tcg.c
> >> @@ -23,6 +23,11 @@
> >>   #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
> >>
> >>   #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
> >> +static bool arm_v7m_cpu_has_work(CPUState *cs)
> >> +{
> >> +    return cs->interrupt_request & CPU_INTERRUPT_HARD;
> >> +}
> >
> > Is this really all that's needed ? I would have expected
> > at least a check on the power_state.
>
> I started reading the PSCI spec this morning and you are right,
> it doesn't seem restricted to A/R profiles, M profiles also have
> it.

It's not that we implement PSCI for M profile (which I don't
think does exist), it's just that we use cpu->power_state to
track "core is powered off or not", and we happen to use the
PSCI_ON/PSCI_OFF constant names for that. This is just for
historical reasons; we started with PSCI support and then later
broadened that into generic "power control" (see arm-powerctl.[ch]),
which is a set of functionality that provides the underlying
"power on, power off" that is used by both our PSCI emulation
and by our emulation of real hardware power-controller devices.
The imx and the allwinner SoCs are A-profile devices that provide
a power-controller emulation.

For M-profile some of the dual-core MPS2 boards set the CPU property
start-powered-off to true, which will cause arm_cpu_reset() to
set cpu->power_state to PSCI_OFF. They're then powered on by
the device code in hw/misc/iotkit-sysctl.c calling
arm_set_cpu_on_and_reset() when the guest writes to the "start this
core now" register.

-- PMM