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[PULL 23/44] target/ppc: add LPCR[HR] to DisasContext and hflags
From: |
David Gibson |
Subject: |
[PULL 23/44] target/ppc: add LPCR[HR] to DisasContext and hflags |
Date: |
Thu, 30 Sep 2021 15:44:05 +1000 |
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
Add a Host Radix field (hr) in DisasContext with LPCR[HR] value to allow
us to decide between Radix and HPT while validating instructions
arguments. Note that PowerISA v3.1 does not require LPCR[HR] and PATE.HR
to match if the thread is in ultravisor/hypervisor real addressing mode,
so ctx->hr may be invalid if ctx->hv and ctx->dr are set.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20210917114751.206845-2-matheus.ferst@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/cpu.h | 1 +
target/ppc/helper_regs.c | 3 +++
target/ppc/translate.c | 2 ++
3 files changed, 6 insertions(+)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 01d3773bc7..baa4e7c34d 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -600,6 +600,7 @@ enum {
HFLAGS_64 = 2, /* computed from MSR_CE and MSR_SF */
HFLAGS_GTSE = 3, /* computed from SPR_LPCR[GTSE] */
HFLAGS_DR = 4, /* MSR_DR */
+ HFLAGS_HR = 5, /* computed from SPR_LPCR[HR] */
HFLAGS_SPE = 6, /* from MSR_SPE if cpu has SPE; avoid overlap w/ MSR_VR */
HFLAGS_TM = 8, /* computed from MSR_TM */
HFLAGS_BE = 9, /* MSR_BE -- from elsewhere on embedded ppc */
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index 405450d863..1bfb480ecf 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -106,6 +106,9 @@ static uint32_t hreg_compute_hflags_value(CPUPPCState *env)
if (env->spr[SPR_LPCR] & LPCR_GTSE) {
hflags |= 1 << HFLAGS_GTSE;
}
+ if (env->spr[SPR_LPCR] & LPCR_HR) {
+ hflags |= 1 << HFLAGS_HR;
+ }
#ifndef CONFIG_USER_ONLY
if (!env->has_hv_mode || (msr & (1ull << MSR_HV))) {
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 5d8b06bd80..9af1624ad2 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -175,6 +175,7 @@ struct DisasContext {
bool spe_enabled;
bool tm_enabled;
bool gtse;
+ bool hr;
ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */
int singlestep_enabled;
uint32_t flags;
@@ -8539,6 +8540,7 @@ static void ppc_tr_init_disas_context(DisasContextBase
*dcbase, CPUState *cs)
ctx->vsx_enabled = (hflags >> HFLAGS_VSX) & 1;
ctx->tm_enabled = (hflags >> HFLAGS_TM) & 1;
ctx->gtse = (hflags >> HFLAGS_GTSE) & 1;
+ ctx->hr = (hflags >> HFLAGS_HR) & 1;
ctx->singlestep_enabled = 0;
if ((hflags >> HFLAGS_SE) & 1) {
--
2.31.1
- [PULL 18/44] qapi/qdev.json: add DEVICE_UNPLUG_GUEST_ERROR QAPI event, (continued)
- [PULL 18/44] qapi/qdev.json: add DEVICE_UNPLUG_GUEST_ERROR QAPI event, David Gibson, 2021/09/30
- [PULL 20/44] memory_hotplug.c: send DEVICE_UNPLUG_GUEST_ERROR in acpi_memory_hotplug_write(), David Gibson, 2021/09/30
- [PULL 09/44] ppc/xive: Export xive_tctx_word2() helper, David Gibson, 2021/09/30
- [PULL 15/44] spapr.c: handle dev->id in spapr_memory_unplug_rollback(), David Gibson, 2021/09/30
- [PULL 19/44] spapr: use DEVICE_UNPLUG_GUEST_ERROR to report unplug errors, David Gibson, 2021/09/30
- [PULL 25/44] spapr_numa.c: split FORM1 code into helpers, David Gibson, 2021/09/30
- [PULL 17/44] qapi/qdev.json: fix DEVICE_DELETED parameters doc, David Gibson, 2021/09/30
- [PULL 08/44] ppc/xive: Export priority_to_ipb() helper, David Gibson, 2021/09/30
- [PULL 21/44] target/ppc: Convert debug to trace events (exceptions), David Gibson, 2021/09/30
- [PULL 22/44] target/ppc: Replace debug messages by asserts for unknown IRQ pins, David Gibson, 2021/09/30
- [PULL 23/44] target/ppc: add LPCR[HR] to DisasContext and hflags,
David Gibson <=
- [PULL 24/44] target/ppc: Check privilege level based on PSR and LPCR[HR] in tlbie[l], David Gibson, 2021/09/30
- [PULL 26/44] spapr_numa.c: scrap 'legacy_numa' concept, David Gibson, 2021/09/30
- [PULL 27/44] spapr_numa.c: parametrize FORM1 macros, David Gibson, 2021/09/30
- [PULL 29/44] spapr: move FORM1 verifications to post CAS, David Gibson, 2021/09/30
- [PULL 32/44] target/ppc: Convert debug to trace events (decrementer and IRQ), David Gibson, 2021/09/30
- [PULL 36/44] hw/intc: openpic: Clean up the styles, David Gibson, 2021/09/30
- [PULL 28/44] spapr_numa.c: rename numa_assoc_array to FORM1_assoc_array, David Gibson, 2021/09/30
- [PULL 30/44] spapr_numa.c: FORM2 NUMA affinity support, David Gibson, 2021/09/30
- [PULL 33/44] target/ppc: Fix 64-bit decrementer, David Gibson, 2021/09/30
- [PULL 34/44] hw/intc: openpic: Correct the reset value of IPIDR for FSL chipset, David Gibson, 2021/09/30