[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v4 35/45] target/arm: Enable SCR and HCR bits for RAS
From: |
Richard Henderson |
Subject: |
[PATCH v4 35/45] target/arm: Enable SCR and HCR bits for RAS |
Date: |
Sat, 30 Apr 2022 22:50:17 -0700 |
Enable writes to the TERR and TEA bits when RAS is enabled.
These bits are otherwise RES0.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index b4bdd4a4a6..f6f26766e2 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -1755,6 +1755,9 @@ static void scr_write(CPUARMState *env, const
ARMCPRegInfo *ri, uint64_t value)
}
valid_mask &= ~SCR_NET;
+ if (cpu_isar_feature(aa64_ras, cpu)) {
+ valid_mask |= SCR_TERR;
+ }
if (cpu_isar_feature(aa64_lor, cpu)) {
valid_mask |= SCR_TLOR;
}
@@ -1769,6 +1772,9 @@ static void scr_write(CPUARMState *env, const
ARMCPRegInfo *ri, uint64_t value)
}
} else {
valid_mask &= ~(SCR_RW | SCR_ST);
+ if (cpu_isar_feature(aa32_ras, cpu)) {
+ valid_mask |= SCR_TERR;
+ }
}
if (!arm_feature(env, ARM_FEATURE_EL2)) {
@@ -5126,6 +5132,9 @@ static void do_hcr_write(CPUARMState *env, uint64_t
value, uint64_t valid_mask)
if (cpu_isar_feature(aa64_vh, cpu)) {
valid_mask |= HCR_E2H;
}
+ if (cpu_isar_feature(aa64_ras, cpu)) {
+ valid_mask |= HCR_TERR | HCR_TEA;
+ }
if (cpu_isar_feature(aa64_lor, cpu)) {
valid_mask |= HCR_TLOR;
}
--
2.34.1
- Re: [PATCH v4 10/45] target/arm: Drop always-true test in define_arm_vh_e2h_redirects_aliases, (continued)
- [PATCH v4 27/45] target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max, Richard Henderson, 2022/05/01
- [PATCH v4 22/45] target/arm: Merge zcr reginfo, Richard Henderson, 2022/05/01
- [PATCH v4 31/45] target/arm: Enable FEAT_Debugv8p2 for -cpu max, Richard Henderson, 2022/05/01
- [PATCH v4 24/45] target/arm: Adjust definition of CONTEXTIDR_EL2, Richard Henderson, 2022/05/01
- [PATCH v4 38/45] target/arm: Enable FEAT_RAS for -cpu max, Richard Henderson, 2022/05/01
- [PATCH v4 07/45] target/arm: Change cpreg access permissions to enum, Richard Henderson, 2022/05/01
- [PATCH v4 28/45] target/arm: Split out aa32_max_features, Richard Henderson, 2022/05/01
- [PATCH v4 33/45] target/arm: Add isar_feature_{aa64,any}_ras, Richard Henderson, 2022/05/01
- [PATCH v4 35/45] target/arm: Enable SCR and HCR bits for RAS,
Richard Henderson <=
- [PATCH v4 37/45] target/arm: Implement ESB instruction, Richard Henderson, 2022/05/01
- [PATCH v4 19/45] target/arm: Remove HOST_BIG_ENDIAN ifdef in add_cpreg_to_hashtable, Richard Henderson, 2022/05/01
- [PATCH v4 23/45] target/arm: Add isar predicates for FEAT_Debugv8p2, Richard Henderson, 2022/05/01
- [PATCH v4 29/45] target/arm: Annotate arm_max_initfn with FEAT identifiers, Richard Henderson, 2022/05/01
- [PATCH v4 36/45] target/arm: Implement virtual SError exceptions, Richard Henderson, 2022/05/01
- [PATCH v4 40/45] target/arm: Enable FEAT_CSV2 for -cpu max, Richard Henderson, 2022/05/01
- [PATCH v4 41/45] target/arm: Enable FEAT_CSV2_2 for -cpu max, Richard Henderson, 2022/05/01