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[PATCH v1 3/4] xlnx_dp: Fix the interrupt disable logic
From: |
frederic.konrad |
Subject: |
[PATCH v1 3/4] xlnx_dp: Fix the interrupt disable logic |
Date: |
Tue, 3 May 2022 16:25:44 +0100 |
From: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Fix interrupt disable logic. Mask value 1 indicates that interrupts are
disabled.
Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Frederic Konrad <fkonrad@amd.com>
---
hw/display/xlnx_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c
index 984b0a6bb9..c60e8d0386 100644
--- a/hw/display/xlnx_dp.c
+++ b/hw/display/xlnx_dp.c
@@ -885,7 +885,7 @@ static void xlnx_dp_write(void *opaque, hwaddr offset,
uint64_t value,
xlnx_dp_update_irq(s);
break;
case DP_INT_DS:
- s->core_registers[DP_INT_MASK] |= ~value;
+ s->core_registers[DP_INT_MASK] |= value;
xlnx_dp_update_irq(s);
break;
default:
--
2.25.1