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Re: [PATCH] target/openrisc: Do not reset delay slot flag on early tb ex
From: |
Stafford Horne |
Subject: |
Re: [PATCH] target/openrisc: Do not reset delay slot flag on early tb exit |
Date: |
Thu, 12 May 2022 06:43:49 +0900 |
On Wed, May 11, 2022 at 07:32:58AM -0700, Richard Henderson wrote:
> On 5/11/22 05:05, Stafford Horne wrote:
> > +static void openrisc_cpu_synchronize_from_tb(CPUState *cs,
> > + const TranslationBlock *tb)
> > +{
> > + OpenRISCCPU *cpu = OPENRISC_CPU(cs);
> > +
> > + cpu->env.pc = tb->pc;
> > +}
>
> If mips is a guide, you'd want to set dflag based on
>
> tb->flags & TB_FLAGS_DFLAG
>
> as well. But I think openrisc is more careful to keep dflag up-to-date.
I was thinking that too so I left it out.
For example:
0xc01e3ffc: l.bf 3
0xc01e4000: l.ori r12, r0, 1
---
---- c01e3ffc 00000000
movcond_i32 jmp_pc,sr_f,$0x0,$0xc01e4008,$0xc01e4004,ne sync: 0 dead: 0
1 2 3 4 pref=0xffff
mov_i32 dflag,$0x1 sync: 0 dead: 0 1 pref=0xffff
mov_i32 ppc,$0xc01e3ffc sync: 0 dead: 0 1 pref=0xffff
mov_i32 pc,$0xc01e4000 sync: 0 dead: 0 1 pref=0xffff
call lookup_tb_ptr,$0x6,$1,tmp7,env dead: 1 pref=none
goto_ptr tmp7 dead: 0
set_label $L0
exit_tb $0x7f7b047f3b43
---
ld_i32 tmp0,env,$0xfffffffffffffff0 pref=0xffff
brcond_i32 tmp0,$0x0,lt,$L0 dead: 0
---- c01e4000 00000001
mov_i32 r12,$0x1 sync: 0 dead: 0 1 pref=0xffff
mov_i32 dflag,$0x0 sync: 0 dead: 0 1 pref=0xffff
mov_i32 ppc,$0xc01e4000 sync: 0 dead: 0 1 pref=0xffff
mov_i32 pc,jmp_pc sync: 0 dead: 0 1 pref=0xffff
discard jmp_pc pref=none
call lookup_tb_ptr,$0x6,$1,tmp4,env dead: 1 pref=none
goto_ptr tmp4 dead: 0
set_label $L0
exit_tb $0x7f7b047f3c83
This is an example of a branch followed by a branch delay slot. If we exit the
branch delay slot via `exit_tb $0x7f7b047f3c83`. The `mov_i32 dflag,$0x1`
instruction
would have run from `c01e3ffc` having env already updated.
At this point how would tb->flags have the right value? Would it always be set
correctly by `cpu_get_tb_cpu_state` in the `lookup_tb_ptr`call?
-Stafford