[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 08/27] tests/qtest/libqos/pci: Introduce pio_limit
From: |
Paolo Bonzini |
Subject: |
[PULL 08/27] tests/qtest/libqos/pci: Introduce pio_limit |
Date: |
Thu, 12 May 2022 19:24:46 +0200 |
From: Eric Auger <eric.auger@redhat.com>
At the moment the IO space limit is hardcoded to
QPCI_PIO_LIMIT = 0x10000. When accesses are performed to a bar,
the base address of this latter is compared against the limit
to decide whether we perform an IO or a memory access.
On ARM, we cannot keep this PIO limit as the arm-virt machine
uses [0x3eff0000, 0x3f000000 ] for the IO space map and we
are mandated to allocate at 0x0.
Add a new flag in QPCIBar indicating whether it is an IO bar
or a memory bar. This flag is set on QPCIBar allocation and
provisionned based on the BAR configuration. Then the new flag
is used in access functions and in iomap() function.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220504152025.1785704-2-eric.auger@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
tests/qtest/libqos/pci-pc.c | 1 +
tests/qtest/libqos/pci-spapr.c | 1 +
tests/qtest/libqos/pci.c | 78 ++++++++++++++++++++++------------
tests/qtest/libqos/pci.h | 5 +--
4 files changed, 54 insertions(+), 31 deletions(-)
diff --git a/tests/qtest/libqos/pci-pc.c b/tests/qtest/libqos/pci-pc.c
index e9dd5a57ec..81c2c055ca 100644
--- a/tests/qtest/libqos/pci-pc.c
+++ b/tests/qtest/libqos/pci-pc.c
@@ -150,6 +150,7 @@ void qpci_init_pc(QPCIBusPC *qpci, QTestState *qts,
QGuestAllocator *alloc)
qpci->bus.qts = qts;
qpci->bus.pio_alloc_ptr = 0xc000;
+ qpci->bus.pio_limit = 0x10000;
qpci->bus.mmio_alloc_ptr = 0xE0000000;
qpci->bus.mmio_limit = 0x100000000ULL;
diff --git a/tests/qtest/libqos/pci-spapr.c b/tests/qtest/libqos/pci-spapr.c
index 76bf9a855d..0f1023e4a7 100644
--- a/tests/qtest/libqos/pci-spapr.c
+++ b/tests/qtest/libqos/pci-spapr.c
@@ -197,6 +197,7 @@ void qpci_init_spapr(QPCIBusSPAPR *qpci, QTestState *qts,
qpci->bus.qts = qts;
qpci->bus.pio_alloc_ptr = 0xc000;
+ qpci->bus.pio_limit = 0x10000;
qpci->bus.mmio_alloc_ptr = qpci->mmio32.pci_base;
qpci->bus.mmio_limit = qpci->mmio32.pci_base + qpci->mmio32.size;
diff --git a/tests/qtest/libqos/pci.c b/tests/qtest/libqos/pci.c
index 3a9076ae58..b23d72346b 100644
--- a/tests/qtest/libqos/pci.c
+++ b/tests/qtest/libqos/pci.c
@@ -398,44 +398,56 @@ void qpci_config_writel(QPCIDevice *dev, uint8_t offset,
uint32_t value)
uint8_t qpci_io_readb(QPCIDevice *dev, QPCIBar token, uint64_t off)
{
- if (token.addr < QPCI_PIO_LIMIT) {
- return dev->bus->pio_readb(dev->bus, token.addr + off);
+ QPCIBus *bus = dev->bus;
+
+ if (token.is_io) {
+ return bus->pio_readb(bus, token.addr + off);
} else {
uint8_t val;
- dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val));
+
+ bus->memread(dev->bus, token.addr + off, &val, sizeof(val));
return val;
}
}
uint16_t qpci_io_readw(QPCIDevice *dev, QPCIBar token, uint64_t off)
{
- if (token.addr < QPCI_PIO_LIMIT) {
- return dev->bus->pio_readw(dev->bus, token.addr + off);
+ QPCIBus *bus = dev->bus;
+
+ if (token.is_io) {
+ return bus->pio_readw(bus, token.addr + off);
} else {
uint16_t val;
- dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val));
+
+ bus->memread(bus, token.addr + off, &val, sizeof(val));
return le16_to_cpu(val);
}
}
uint32_t qpci_io_readl(QPCIDevice *dev, QPCIBar token, uint64_t off)
{
- if (token.addr < QPCI_PIO_LIMIT) {
- return dev->bus->pio_readl(dev->bus, token.addr + off);
+ QPCIBus *bus = dev->bus;
+
+ if (token.is_io) {
+ return bus->pio_readl(bus, token.addr + off);
} else {
uint32_t val;
- dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val));
+
+ bus->memread(dev->bus, token.addr + off, &val, sizeof(val));
return le32_to_cpu(val);
}
}
uint64_t qpci_io_readq(QPCIDevice *dev, QPCIBar token, uint64_t off)
{
- if (token.addr < QPCI_PIO_LIMIT) {
- return dev->bus->pio_readq(dev->bus, token.addr + off);
+ QPCIBus *bus = dev->bus;
+
+ if (token.is_io) {
+ return bus->pio_readq(bus, token.addr + off);
} else {
uint64_t val;
- dev->bus->memread(dev->bus, token.addr + off, &val, sizeof(val));
+
+ bus->memread(bus, token.addr + off, &val, sizeof(val));
return le64_to_cpu(val);
}
}
@@ -443,57 +455,65 @@ uint64_t qpci_io_readq(QPCIDevice *dev, QPCIBar token,
uint64_t off)
void qpci_io_writeb(QPCIDevice *dev, QPCIBar token, uint64_t off,
uint8_t value)
{
- if (token.addr < QPCI_PIO_LIMIT) {
- dev->bus->pio_writeb(dev->bus, token.addr + off, value);
+ QPCIBus *bus = dev->bus;
+
+ if (token.is_io) {
+ bus->pio_writeb(bus, token.addr + off, value);
} else {
- dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(value));
+ bus->memwrite(bus, token.addr + off, &value, sizeof(value));
}
}
void qpci_io_writew(QPCIDevice *dev, QPCIBar token, uint64_t off,
uint16_t value)
{
- if (token.addr < QPCI_PIO_LIMIT) {
- dev->bus->pio_writew(dev->bus, token.addr + off, value);
+ QPCIBus *bus = dev->bus;
+
+ if (token.is_io) {
+ bus->pio_writew(bus, token.addr + off, value);
} else {
value = cpu_to_le16(value);
- dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(value));
+ bus->memwrite(bus, token.addr + off, &value, sizeof(value));
}
}
void qpci_io_writel(QPCIDevice *dev, QPCIBar token, uint64_t off,
uint32_t value)
{
- if (token.addr < QPCI_PIO_LIMIT) {
- dev->bus->pio_writel(dev->bus, token.addr + off, value);
+ QPCIBus *bus = dev->bus;
+
+ if (token.is_io) {
+ bus->pio_writel(bus, token.addr + off, value);
} else {
value = cpu_to_le32(value);
- dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(value));
+ bus->memwrite(bus, token.addr + off, &value, sizeof(value));
}
}
void qpci_io_writeq(QPCIDevice *dev, QPCIBar token, uint64_t off,
uint64_t value)
{
- if (token.addr < QPCI_PIO_LIMIT) {
- dev->bus->pio_writeq(dev->bus, token.addr + off, value);
+ QPCIBus *bus = dev->bus;
+
+ if (token.is_io) {
+ bus->pio_writeq(bus, token.addr + off, value);
} else {
value = cpu_to_le64(value);
- dev->bus->memwrite(dev->bus, token.addr + off, &value, sizeof(value));
+ bus->memwrite(bus, token.addr + off, &value, sizeof(value));
}
}
void qpci_memread(QPCIDevice *dev, QPCIBar token, uint64_t off,
void *buf, size_t len)
{
- g_assert(token.addr >= QPCI_PIO_LIMIT);
+ g_assert(!token.is_io);
dev->bus->memread(dev->bus, token.addr + off, buf, len);
}
void qpci_memwrite(QPCIDevice *dev, QPCIBar token, uint64_t off,
const void *buf, size_t len)
{
- g_assert(token.addr >= QPCI_PIO_LIMIT);
+ g_assert(!token.is_io);
dev->bus->memwrite(dev->bus, token.addr + off, buf, len);
}
@@ -534,9 +554,10 @@ QPCIBar qpci_iomap(QPCIDevice *dev, int barno, uint64_t
*sizeptr)
loc = QEMU_ALIGN_UP(bus->pio_alloc_ptr, size);
g_assert(loc >= bus->pio_alloc_ptr);
- g_assert(loc + size <= QPCI_PIO_LIMIT); /* Keep PIO below 64kiB */
+ g_assert(loc + size <= bus->pio_limit);
bus->pio_alloc_ptr = loc + size;
+ bar.is_io = true;
qpci_config_writel(dev, bar_reg, loc | PCI_BASE_ADDRESS_SPACE_IO);
} else {
@@ -547,6 +568,7 @@ QPCIBar qpci_iomap(QPCIDevice *dev, int barno, uint64_t
*sizeptr)
g_assert(loc + size <= bus->mmio_limit);
bus->mmio_alloc_ptr = loc + size;
+ bar.is_io = false;
qpci_config_writel(dev, bar_reg, loc);
}
@@ -562,7 +584,7 @@ void qpci_iounmap(QPCIDevice *dev, QPCIBar bar)
QPCIBar qpci_legacy_iomap(QPCIDevice *dev, uint16_t addr)
{
- QPCIBar bar = { .addr = addr };
+ QPCIBar bar = { .addr = addr, .is_io = true };
return bar;
}
diff --git a/tests/qtest/libqos/pci.h b/tests/qtest/libqos/pci.h
index e705e06598..a3c657d962 100644
--- a/tests/qtest/libqos/pci.h
+++ b/tests/qtest/libqos/pci.h
@@ -16,8 +16,6 @@
#include "../libqtest.h"
#include "qgraph.h"
-#define QPCI_PIO_LIMIT 0x10000
-
#define QPCI_DEVFN(dev, fn) (((dev) << 3) | (fn))
typedef struct QPCIDevice QPCIDevice;
@@ -51,7 +49,7 @@ struct QPCIBus {
uint8_t offset, uint32_t value);
QTestState *qts;
- uint16_t pio_alloc_ptr;
+ uint64_t pio_alloc_ptr, pio_limit;
uint64_t mmio_alloc_ptr, mmio_limit;
bool has_buggy_msi; /* TRUE for spapr, FALSE for pci */
@@ -59,6 +57,7 @@ struct QPCIBus {
struct QPCIBar {
uint64_t addr;
+ bool is_io;
};
struct QPCIDevice
--
2.36.0
- [PULL 11/27] machine: use QAPI struct for boot configuration, (continued)
- [PULL 11/27] machine: use QAPI struct for boot configuration, Paolo Bonzini, 2022/05/12
- [PULL 12/27] machine: add boot compound property, Paolo Bonzini, 2022/05/12
- [PULL 16/27] slirp: bump submodule past 4.7 release, Paolo Bonzini, 2022/05/12
- [PULL 06/27] hw/xen/xen_pt: Confine igd-passthrough-isa-bridge to XEN, Paolo Bonzini, 2022/05/12
- [PULL 14/27] machine: make memory-backend a link property, Paolo Bonzini, 2022/05/12
- [PULL 17/27] net: slirp: introduce a wrapper struct for QemuTimer, Paolo Bonzini, 2022/05/12
- [PULL 18/27] net: slirp: switch to slirp_new, Paolo Bonzini, 2022/05/12
- [PULL 20/27] net: slirp: allow CFI with libslirp >= 4.7, Paolo Bonzini, 2022/05/12
- [PULL 21/27] coroutine-lock: qemu_co_queue_next is a coroutine-only qemu_co_enter_next, Paolo Bonzini, 2022/05/12
- [PULL 22/27] coroutine-lock: introduce qemu_co_queue_enter_all, Paolo Bonzini, 2022/05/12
- [PULL 08/27] tests/qtest/libqos/pci: Introduce pio_limit,
Paolo Bonzini <=
- [PULL 04/27] checkpatch: fix g_malloc check, Paolo Bonzini, 2022/05/12
- [PULL 07/27] hw/xen/xen_pt: Resolve igd_passthrough_isa_bridge_create() indirection, Paolo Bonzini, 2022/05/12
- [PULL 09/27] tests/qtest/libqos: Skip hotplug tests if pci root bus is not hotpluggable, Paolo Bonzini, 2022/05/12
- [PULL 10/27] tests/qtest/libqos: Add generic pci host bridge in arm-virt machine, Paolo Bonzini, 2022/05/12
- [PULL 13/27] machine: add mem compound property, Paolo Bonzini, 2022/05/12
- [PULL 15/27] machine: move more memory validation to Machine object, Paolo Bonzini, 2022/05/12
- [PULL 19/27] net: slirp: add support for CFI-friendly timer API, Paolo Bonzini, 2022/05/12
- [PULL 23/27] coroutine-lock: qemu_co_queue_restart_all is a coroutine-only qemu_co_enter_all, Paolo Bonzini, 2022/05/12
- [PULL 25/27] meson: link libpng independent of vnc, Paolo Bonzini, 2022/05/12
- [PULL 26/27] vl: make machine type deprecation a warning, Paolo Bonzini, 2022/05/12