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Re: [PATCH] whpx: Added support for saving/restoring VM state
From: |
Paolo Bonzini |
Subject: |
Re: [PATCH] whpx: Added support for saving/restoring VM state |
Date: |
Tue, 17 May 2022 16:11:49 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 |
On 5/16/22 20:44, Ivan Shcherbakov wrote:
Passing it to x86_cpu_xrstor_all_areas()/x86_cpu_xsave_all_areas() changed the
following values:
0x0000001C: ff ff -> 00 00
0x00000208: 07 -> 00
0x0000020F: 80 -> 00
0x1C-0x1F is MXCSR_MASK. There's already a field in the x86 CPUState,
but it was forgotten in
x86_cpu_xsave_all_areas()/x86_cpu_xrstor_all_areas(). The field should
also be initialized to 0xffff in the CPU reset function.
0x208...0x20F is XCOMP_BV and bit 63 in there is indeed signaling
compacted format. First of all I'd start with your patch and hack it to
check if Hyper-V accepts zero at 0x208..0x20F; in this specific case of
0x208...0x20F have all low consecutive bits set plus bit 63 set, it's
fine to do just that. If so, x86_cpu_xrstor_all_areas() needs no
support for compacted format. I would be somewhat surprised if Hyper-V
needs support in XRSTOR too.
For XSAVE, the algorithm to compute the offset (instead of just using
x->offset) is given in the Intel manual:
If XCOMP_BV[i] = 0, state component i is not in the XSAVE area at all.
If XCOMP_BV[i] = 1, state component i is located at a byte offset from
the base address of the XSAVE area, which is determined by the following
steps:
- If i is the first bit set in bits 62:2 of the XCOMP_BV, state
component i starts at offset 576
- Otherwise, take CPUID[EAX=0DH,ECX=i].ECX[1]:
- If it is 0, state component i starts right after the preceding state
component whose bit is set in XCOMP_BV (where the size of component
j is enumerated in CPUID[EAX=0DH,ECX=j].EAX).
- If it is 1, state component i starts after the preceding state
component whose bit is set in XCOMP_BV, but on a 64-byte aligned
offset relative to the beginning of the XSAVE area.
Paolo