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[PULL 07/15] hw: aspeed: Add uarts_num SoC attribute
From: |
Cédric Le Goater |
Subject: |
[PULL 07/15] hw: aspeed: Add uarts_num SoC attribute |
Date: |
Wed, 25 May 2022 18:01:28 +0200 |
From: Peter Delevoryas <pdel@fb.com>
AST2400 and AST2500 have 5 UART's, while the AST2600 and AST1030 have 13.
Signed-off-by: Peter Delevoryas <pdel@fb.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220516062328.298336-3-pdel@fb.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/arm/aspeed_soc.h | 1 +
hw/arm/aspeed_ast10x0.c | 1 +
hw/arm/aspeed_ast2600.c | 1 +
hw/arm/aspeed_soc.c | 2 ++
4 files changed, 5 insertions(+)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 709a78285b59..669bc4985571 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -91,6 +91,7 @@ struct AspeedSoCClass {
int ehcis_num;
int wdts_num;
int macs_num;
+ int uarts_num;
const int *irqmap;
const hwaddr *memmap;
uint32_t num_cpus;
diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c
index fa2cc4406c0d..bb8177e86c87 100644
--- a/hw/arm/aspeed_ast10x0.c
+++ b/hw/arm/aspeed_ast10x0.c
@@ -301,6 +301,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass
*klass, void *data)
sc->ehcis_num = 0;
sc->wdts_num = 4;
sc->macs_num = 1;
+ sc->uarts_num = 13;
sc->irqmap = aspeed_soc_ast1030_irqmap;
sc->memmap = aspeed_soc_ast1030_memmap;
sc->num_cpus = 1;
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index f3ecc0f3b7c0..a9523074a089 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -588,6 +588,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *oc,
void *data)
sc->ehcis_num = 2;
sc->wdts_num = 4;
sc->macs_num = 4;
+ sc->uarts_num = 13;
sc->irqmap = aspeed_soc_ast2600_irqmap;
sc->memmap = aspeed_soc_ast2600_memmap;
sc->num_cpus = 2;
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 96bc060680c9..7008cd1af716 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -490,6 +490,7 @@ static void aspeed_soc_ast2400_class_init(ObjectClass *oc,
void *data)
sc->ehcis_num = 1;
sc->wdts_num = 2;
sc->macs_num = 2;
+ sc->uarts_num = 5;
sc->irqmap = aspeed_soc_ast2400_irqmap;
sc->memmap = aspeed_soc_ast2400_memmap;
sc->num_cpus = 1;
@@ -516,6 +517,7 @@ static void aspeed_soc_ast2500_class_init(ObjectClass *oc,
void *data)
sc->ehcis_num = 2;
sc->wdts_num = 3;
sc->macs_num = 2;
+ sc->uarts_num = 5;
sc->irqmap = aspeed_soc_ast2500_irqmap;
sc->memmap = aspeed_soc_ast2500_memmap;
sc->num_cpus = 1;
--
2.35.3
- [PULL 00/15] aspeed queue, Cédric Le Goater, 2022/05/25
- [PULL 03/15] docs: aspeed: Add fby35 board, Cédric Le Goater, 2022/05/25
- [PULL 05/15] aspeed: Introduce a get_irq AspeedSoCClass method, Cédric Le Goater, 2022/05/25
- [PULL 04/15] hw: m25p80: allow write_enable latch get/set, Cédric Le Goater, 2022/05/25
- [PULL 02/15] hw/arm/aspeed: Add fby35 machine type, Cédric Le Goater, 2022/05/25
- [PULL 01/15] docs: add minibmc section in aspeed document, Cédric Le Goater, 2022/05/25
- [PULL 06/15] hw: aspeed: Add missing UART's, Cédric Le Goater, 2022/05/25
- [PULL 08/15] hw: aspeed: Ensure AST1030 respects uart-default, Cédric Le Goater, 2022/05/25
- [PULL 10/15] hw: aspeed: Init all UART's with serial devices, Cédric Le Goater, 2022/05/25
- [PULL 11/15] hw/gpio Add GPIO read/write trace event., Cédric Le Goater, 2022/05/25
- [PULL 07/15] hw: aspeed: Add uarts_num SoC attribute,
Cédric Le Goater <=
- [PULL 12/15] hw/gpio: Add ASPEED GPIO model for AST1030, Cédric Le Goater, 2022/05/25
- [PULL 09/15] hw: aspeed: Introduce common UART init function, Cédric Le Goater, 2022/05/25
- [PULL 13/15] hw/gpio support GPIO index mode for write operation., Cédric Le Goater, 2022/05/25
- [PULL 14/15] hw/gpio: replace HWADDR_PRIx with PRIx64, Cédric Le Goater, 2022/05/25
- [PULL 15/15] hw/arm/aspeed: Add i2c devices for AST2600 EVB, Cédric Le Goater, 2022/05/25
- Re: [PULL 00/15] aspeed queue, Richard Henderson, 2022/05/25