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[PULL 005/117] target/arm: Move null function and sve check into gen_gve
From: |
Peter Maydell |
Subject: |
[PULL 005/117] target/arm: Move null function and sve check into gen_gvec_ool_zz |
Date: |
Mon, 30 May 2022 17:05:16 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-3-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-sve.c | 36 +++++++++++++++---------------------
1 file changed, 15 insertions(+), 21 deletions(-)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index dd4a5b23ab6..903514cb6a8 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -137,13 +137,19 @@ static int pred_gvec_reg_size(DisasContext *s)
}
/* Invoke an out-of-line helper on 2 Zregs. */
-static void gen_gvec_ool_zz(DisasContext *s, gen_helper_gvec_2 *fn,
+static bool gen_gvec_ool_zz(DisasContext *s, gen_helper_gvec_2 *fn,
int rd, int rn, int data)
{
- unsigned vsz = vec_full_reg_size(s);
- tcg_gen_gvec_2_ool(vec_full_reg_offset(s, rd),
- vec_full_reg_offset(s, rn),
- vsz, vsz, data, fn);
+ if (fn == NULL) {
+ return false;
+ }
+ if (sve_access_check(s)) {
+ unsigned vsz = vec_full_reg_size(s);
+ tcg_gen_gvec_2_ool(vec_full_reg_offset(s, rd),
+ vec_full_reg_offset(s, rn),
+ vsz, vsz, data, fn);
+ }
+ return true;
}
/* Invoke an out-of-line helper on 3 Zregs. */
@@ -1377,13 +1383,7 @@ static bool trans_FEXPA(DisasContext *s, arg_rr_esz *a)
gen_helper_sve_fexpa_s,
gen_helper_sve_fexpa_d,
};
- if (a->esz == 0) {
- return false;
- }
- if (sve_access_check(s)) {
- gen_gvec_ool_zz(s, fns[a->esz], a->rd, a->rn, 0);
- }
- return true;
+ return gen_gvec_ool_zz(s, fns[a->esz], a->rd, a->rn, 0);
}
static bool trans_FTSSEL(DisasContext *s, arg_rrr_esz *a)
@@ -2424,11 +2424,7 @@ static bool trans_REV_v(DisasContext *s, arg_rr_esz *a)
gen_helper_sve_rev_b, gen_helper_sve_rev_h,
gen_helper_sve_rev_s, gen_helper_sve_rev_d
};
-
- if (sve_access_check(s)) {
- gen_gvec_ool_zz(s, fns[a->esz], a->rd, a->rn, 0);
- }
- return true;
+ return gen_gvec_ool_zz(s, fns[a->esz], a->rd, a->rn, 0);
}
static bool trans_TBL(DisasContext *s, arg_rrr_esz *a)
@@ -8385,10 +8381,8 @@ static bool trans_AESMC(DisasContext *s, arg_AESMC *a)
if (!dc_isar_feature(aa64_sve2_aes, s)) {
return false;
}
- if (sve_access_check(s)) {
- gen_gvec_ool_zz(s, gen_helper_crypto_aesmc, a->rd, a->rd, a->decrypt);
- }
- return true;
+ return gen_gvec_ool_zz(s, gen_helper_crypto_aesmc,
+ a->rd, a->rd, a->decrypt);
}
static bool do_aese(DisasContext *s, arg_rrr_esz *a, bool decrypt)
--
2.25.1
- [PULL 000/117] target-arm queue, Peter Maydell, 2022/05/30
- [PULL 003/117] hw/sd/allwinner-sdhost: report FIFO water level as 1 when data ready, Peter Maydell, 2022/05/30
- [PULL 005/117] target/arm: Move null function and sve check into gen_gvec_ool_zz,
Peter Maydell <=
- [PULL 011/117] target/arm: Move null function and sve check into gen_gvec_ool_zzzz, Peter Maydell, 2022/05/30
- [PULL 010/117] target/arm: Use TRANS_FEAT for do_sve2_zzz_ool, Peter Maydell, 2022/05/30
- [PULL 012/117] target/arm: Use TRANS_FEAT for gen_gvec_ool_zzzz, Peter Maydell, 2022/05/30
- [PULL 013/117] target/arm: Introduce gen_gvec_ool_arg_zzzz, Peter Maydell, 2022/05/30
- [PULL 001/117] docs/system/arm: Add FEAT_HCX to list of emulated features, Peter Maydell, 2022/05/30
- [PULL 007/117] target/arm: Move null function and sve check into gen_gvec_ool_zzz, Peter Maydell, 2022/05/30
- [PULL 015/117] target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zzzz, Peter Maydell, 2022/05/30
- [PULL 006/117] target/arm: Use TRANS_FEAT for gen_gvec_ool_zz, Peter Maydell, 2022/05/30
- [PULL 002/117] target/arm/hvf: Include missing "cpregs.h", Peter Maydell, 2022/05/30
- [PULL 009/117] target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zzz, Peter Maydell, 2022/05/30