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[PULL 034/117] target/arm: Rename do_zzz_fn to gen_gvec_fn_arg_zzz
From: |
Peter Maydell |
Subject: |
[PULL 034/117] target/arm: Rename do_zzz_fn to gen_gvec_fn_arg_zzz |
Date: |
Mon, 30 May 2022 17:05:45 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Rename the function to match gen_gvec_fn_zzz,
and move to be adjacent.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-32-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-sve.c | 31 ++++++++++++++++---------------
1 file changed, 16 insertions(+), 15 deletions(-)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 3af4626e58a..1b3afcc24cf 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -274,6 +274,12 @@ static bool gen_gvec_fn_zzz(DisasContext *s, GVecGen3Fn
*gvec_fn,
return true;
}
+static bool gen_gvec_fn_arg_zzz(DisasContext *s, GVecGen3Fn *fn,
+ arg_rrr_esz *a)
+{
+ return gen_gvec_fn_zzz(s, fn, a->esz, a->rd, a->rn, a->rm);
+}
+
/* Invoke a vector expander on four Zregs. */
static void gen_gvec_fn_zzzz(DisasContext *s, GVecGen4Fn *gvec_fn,
int esz, int rd, int rn, int rm, int ra)
@@ -370,29 +376,24 @@ const uint64_t pred_esz_masks[4] = {
*** SVE Logical - Unpredicated Group
*/
-static bool do_zzz_fn(DisasContext *s, arg_rrr_esz *a, GVecGen3Fn *gvec_fn)
-{
- return gen_gvec_fn_zzz(s, gvec_fn, a->esz, a->rd, a->rn, a->rm);
-}
-
static bool trans_AND_zzz(DisasContext *s, arg_rrr_esz *a)
{
- return do_zzz_fn(s, a, tcg_gen_gvec_and);
+ return gen_gvec_fn_arg_zzz(s, tcg_gen_gvec_and, a);
}
static bool trans_ORR_zzz(DisasContext *s, arg_rrr_esz *a)
{
- return do_zzz_fn(s, a, tcg_gen_gvec_or);
+ return gen_gvec_fn_arg_zzz(s, tcg_gen_gvec_or, a);
}
static bool trans_EOR_zzz(DisasContext *s, arg_rrr_esz *a)
{
- return do_zzz_fn(s, a, tcg_gen_gvec_xor);
+ return gen_gvec_fn_arg_zzz(s, tcg_gen_gvec_xor, a);
}
static bool trans_BIC_zzz(DisasContext *s, arg_rrr_esz *a)
{
- return do_zzz_fn(s, a, tcg_gen_gvec_andc);
+ return gen_gvec_fn_arg_zzz(s, tcg_gen_gvec_andc, a);
}
static void gen_xar8_i64(TCGv_i64 d, TCGv_i64 n, TCGv_i64 m, int64_t sh)
@@ -707,32 +708,32 @@ static bool trans_NBSL(DisasContext *s, arg_rrrr_esz *a)
static bool trans_ADD_zzz(DisasContext *s, arg_rrr_esz *a)
{
- return do_zzz_fn(s, a, tcg_gen_gvec_add);
+ return gen_gvec_fn_arg_zzz(s, tcg_gen_gvec_add, a);
}
static bool trans_SUB_zzz(DisasContext *s, arg_rrr_esz *a)
{
- return do_zzz_fn(s, a, tcg_gen_gvec_sub);
+ return gen_gvec_fn_arg_zzz(s, tcg_gen_gvec_sub, a);
}
static bool trans_SQADD_zzz(DisasContext *s, arg_rrr_esz *a)
{
- return do_zzz_fn(s, a, tcg_gen_gvec_ssadd);
+ return gen_gvec_fn_arg_zzz(s, tcg_gen_gvec_ssadd, a);
}
static bool trans_SQSUB_zzz(DisasContext *s, arg_rrr_esz *a)
{
- return do_zzz_fn(s, a, tcg_gen_gvec_sssub);
+ return gen_gvec_fn_arg_zzz(s, tcg_gen_gvec_sssub, a);
}
static bool trans_UQADD_zzz(DisasContext *s, arg_rrr_esz *a)
{
- return do_zzz_fn(s, a, tcg_gen_gvec_usadd);
+ return gen_gvec_fn_arg_zzz(s, tcg_gen_gvec_usadd, a);
}
static bool trans_UQSUB_zzz(DisasContext *s, arg_rrr_esz *a)
{
- return do_zzz_fn(s, a, tcg_gen_gvec_ussub);
+ return gen_gvec_fn_arg_zzz(s, tcg_gen_gvec_ussub, a);
}
/*
--
2.25.1
- [PULL 017/117] target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zzxz, (continued)
- [PULL 017/117] target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zzxz, Peter Maydell, 2022/05/30
- [PULL 018/117] target/arm: Use TRANS_FEAT for do_sve2_zzz_data, Peter Maydell, 2022/05/30
- [PULL 004/117] target/arm: Introduce TRANS, TRANS_FEAT, Peter Maydell, 2022/05/30
- [PULL 021/117] target/arm: Use TRANS_FEAT for USDOT_zzzz, Peter Maydell, 2022/05/30
- [PULL 022/117] target/arm: Move null function and sve check into gen_gvec_ool_zzp, Peter Maydell, 2022/05/30
- [PULL 020/117] target/arm: Use TRANS_FEAT for do_sve2_zzw_data, Peter Maydell, 2022/05/30
- [PULL 025/117] target/arm: Use TRANS_FEAT for do_sve2_zpz_data, Peter Maydell, 2022/05/30
- [PULL 030/117] target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zpzz, Peter Maydell, 2022/05/30
- [PULL 029/117] target/arm: Introduce gen_gvec_ool_arg_zpzz, Peter Maydell, 2022/05/30
- [PULL 024/117] target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zpz, Peter Maydell, 2022/05/30
- [PULL 034/117] target/arm: Rename do_zzz_fn to gen_gvec_fn_arg_zzz,
Peter Maydell <=
- [PULL 039/117] target/arm: Introduce gen_gvec_fn_arg_zzzz, Peter Maydell, 2022/05/30
- [PULL 026/117] target/arm: Rename do_zpzi_ool to gen_gvec_ool_arg_zpzi, Peter Maydell, 2022/05/30
- [PULL 031/117] target/arm: Use TRANS_FEAT for do_sve2_zpzz_ool, Peter Maydell, 2022/05/30
- [PULL 033/117] target/arm: Move null function and sve check into gen_gvec_fn_zzz, Peter Maydell, 2022/05/30
- [PULL 032/117] target/arm: Merge gen_gvec_fn_zz into do_mov_z, Peter Maydell, 2022/05/30
- [PULL 035/117] target/arm: More use of gen_gvec_fn_arg_zzz, Peter Maydell, 2022/05/30
- [PULL 036/117] target/arm: Use TRANS_FEAT for gen_gvec_fn_arg_zzz, Peter Maydell, 2022/05/30
- [PULL 040/117] target/arm: Use TRANS_FEAT for do_sve2_zzzz_fn, Peter Maydell, 2022/05/30
- [PULL 028/117] target/arm: Move null function and sve check into gen_gvec_ool_zzzp, Peter Maydell, 2022/05/30
- [PULL 041/117] target/arm: Introduce gen_gvec_fn_zzi, Peter Maydell, 2022/05/30