[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v12 6/6] target/riscv: Remove additional priv version check for m
From: |
Atish Patra |
Subject: |
[PATCH v12 6/6] target/riscv: Remove additional priv version check for mcountinhibit |
Date: |
Tue, 2 Aug 2022 16:33:07 -0700 |
With .min_priv_version, additiona priv version check is uncessary
for mcountinhibit read/write functions.
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
target/riscv/csr.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 8753280e95b2..67367e678f38 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -1489,10 +1489,6 @@ static RISCVException write_mtvec(CPURISCVState *env,
int csrno,
static RISCVException read_mcountinhibit(CPURISCVState *env, int csrno,
target_ulong *val)
{
- if (env->priv_ver < PRIV_VERSION_1_11_0) {
- return RISCV_EXCP_ILLEGAL_INST;
- }
-
*val = env->mcountinhibit;
return RISCV_EXCP_NONE;
}
@@ -1503,10 +1499,6 @@ static RISCVException write_mcountinhibit(CPURISCVState
*env, int csrno,
int cidx;
PMUCTRState *counter;
- if (env->priv_ver < PRIV_VERSION_1_11_0) {
- return RISCV_EXCP_ILLEGAL_INST;
- }
-
env->mcountinhibit = val;
/* Check if any other counter is also monitoring cycles/instructions */
--
2.25.1
- [PATCH v12 0/6] Improve PMU support, Atish Patra, 2022/08/02
- [PATCH v12 2/6] target/riscv: Simplify counter predicate function, Atish Patra, 2022/08/02
- [PATCH v12 3/6] target/riscv: Add few cache related PMU events, Atish Patra, 2022/08/02
- [PATCH v12 4/6] hw/riscv: virt: Add PMU DT node to the device tree, Atish Patra, 2022/08/02
- [PATCH v12 6/6] target/riscv: Remove additional priv version check for mcountinhibit,
Atish Patra <=
- [PATCH v12 1/6] target/riscv: Add sscofpmf extension support, Atish Patra, 2022/08/02
- [PATCH v12 5/6] target/riscv: Update the privilege field for sscofpmf CSRs, Atish Patra, 2022/08/02
- Re: [PATCH v12 0/6] Improve PMU support, Atish Patra, 2022/08/11