Rename loongarch-fpu64.xml to loongarch-fpu.xml and update loongarch-fpu.xml to
match upstream GDB [1]
[1]:https://github.com/bminor/binutils-gdb/blob/master/gdb/features/loongarch/fpu.xml
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
configs/targets/loongarch64-softmmu.mak | 2 +-
gdb-xml/loongarch-fpu.xml | 50 ++++++++++++++++++++++
gdb-xml/loongarch-fpu64.xml | 57 -------------------------
target/loongarch/gdbstub.c | 2 +-
4 files changed, 52 insertions(+), 59 deletions(-)
create mode 100644 gdb-xml/loongarch-fpu.xml
delete mode 100644 gdb-xml/loongarch-fpu64.xml
diff --git a/configs/targets/loongarch64-softmmu.mak
b/configs/targets/loongarch64-softmmu.mak
index 483474ba93..9abc99056f 100644
--- a/configs/targets/loongarch64-softmmu.mak
+++ b/configs/targets/loongarch64-softmmu.mak
@@ -1,5 +1,5 @@
TARGET_ARCH=loongarch64
TARGET_BASE_ARCH=loongarch
TARGET_SUPPORTS_MTTCG=y
-TARGET_XML_FILES= gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu64.xml
+TARGET_XML_FILES= gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml
TARGET_NEED_FDT=y
diff --git a/gdb-xml/loongarch-fpu.xml b/gdb-xml/loongarch-fpu.xml
new file mode 100644
index 0000000000..a61057ec44
--- /dev/null
+++ b/gdb-xml/loongarch-fpu.xml
@@ -0,0 +1,50 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2021 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.loongarch.fpu">
+
+ <union id="fputype">
+ <field name="f" type="ieee_single"/>
+ <field name="d" type="ieee_double"/>
+ </union>
+
+ <reg name="f0" bitsize="64" type="fputype" group="float"/>
+ <reg name="f1" bitsize="64" type="fputype" group="float"/>
+ <reg name="f2" bitsize="64" type="fputype" group="float"/>
+ <reg name="f3" bitsize="64" type="fputype" group="float"/>
+ <reg name="f4" bitsize="64" type="fputype" group="float"/>
+ <reg name="f5" bitsize="64" type="fputype" group="float"/>
+ <reg name="f6" bitsize="64" type="fputype" group="float"/>
+ <reg name="f7" bitsize="64" type="fputype" group="float"/>
+ <reg name="f8" bitsize="64" type="fputype" group="float"/>
+ <reg name="f9" bitsize="64" type="fputype" group="float"/>
+ <reg name="f10" bitsize="64" type="fputype" group="float"/>
+ <reg name="f11" bitsize="64" type="fputype" group="float"/>
+ <reg name="f12" bitsize="64" type="fputype" group="float"/>
+ <reg name="f13" bitsize="64" type="fputype" group="float"/>
+ <reg name="f14" bitsize="64" type="fputype" group="float"/>
+ <reg name="f15" bitsize="64" type="fputype" group="float"/>
+ <reg name="f16" bitsize="64" type="fputype" group="float"/>
+ <reg name="f17" bitsize="64" type="fputype" group="float"/>
+ <reg name="f18" bitsize="64" type="fputype" group="float"/>
+ <reg name="f19" bitsize="64" type="fputype" group="float"/>
+ <reg name="f20" bitsize="64" type="fputype" group="float"/>
+ <reg name="f21" bitsize="64" type="fputype" group="float"/>
+ <reg name="f22" bitsize="64" type="fputype" group="float"/>
+ <reg name="f23" bitsize="64" type="fputype" group="float"/>
+ <reg name="f24" bitsize="64" type="fputype" group="float"/>
+ <reg name="f25" bitsize="64" type="fputype" group="float"/>
+ <reg name="f26" bitsize="64" type="fputype" group="float"/>
+ <reg name="f27" bitsize="64" type="fputype" group="float"/>
+ <reg name="f28" bitsize="64" type="fputype" group="float"/>
+ <reg name="f29" bitsize="64" type="fputype" group="float"/>
+ <reg name="f30" bitsize="64" type="fputype" group="float"/>
+ <reg name="f31" bitsize="64" type="fputype" group="float"/>
+ <reg name="fcc" bitsize="64" type="fputype" group="float"/>