[PATCH v3 0/9] Add ARM Cortex-R52 cpu

[tobias.roehmel]

From: Tobias Röhmel <tobias.roehmel@rwth-aachen.de>

Thanks for the review!
Here is v3:

v3:
PATCH 2 (Don't add all MIDR aliases for cores that immplement PMSA):
fixed the comment and changed to single element instead of array.
Also the alias is not added for all PMSA CPUs as Peter suggested.
PATCH 3 (Make RVBAR available for all ARMv8 CPUs):
Added the missing RVBAR register as alias to RVBAR_ELx.
Tested that this code actually takes the lower 32 bits
of RVBAR_ELx as RVBAR.

v2:
PATCH 1:
I have left the flag in for now because there there is a lot of use for it in 
the MPU translation code.
The PMSAv8r differs in quite a view ways from the implementation in the 
Cortex-M. I think using
!ARM_FEATURE_M in all of those cases might run into problems down the road when 
new things are added.
But I'll gladly change that if those concerns are not valid.
PATCH 2:
Patch was moved and I removed the ATCM... registers.
PATCH 3:
The issue here is that the R52 has the MPUIR register which shares the encoding 
with one of the
MIDR alias registers. It's now changed to not add that register for 
ARM_FEATURE_V8_R.
PATCH 4:
Added RVBAR for all v8 CPUs instead of just ARMv8r
PATCH 7:
Instead of setting TTBCR_EAE to 1, change all functions that rely on that value 
and are
relevant for Cortex-R52
PATCH 10:
SPSR_hyp changes removed
PATCH 11:
Removed the r52_machine. The issue with adding the Cortex-R52 to the virt board 
is that target_page.bits
is expected to be 12 but is set to 10 for ARM_FEATURE_PMSA. Simply changing 
that or using
virt2.7(which doesn't have that restriction) leads to problems with memory 
accesses. It might be
best to model an existing board.

These patches add the ARM Cortex-R52. The biggest addition is an implementation 
of the armv8-r MPU.

All information is taken from:
- ARM Cortex-R52 TRM revision r1p3
- ARM Architecture Reference Manual Supplement
    -ARMv8 for the ARMv8-R AArch32 architecture profile Version A.c

Functionality that is not implemented:
- Changing between single and double precision floats
- Some hypervisor related functionality (HCR.T(R)VM,HADFSR,...)


Tobias Röhmel (9):
  target/arm: Add ARM_FEATURE_V8_R
  target/arm: Don't add all MIDR aliases for cores that immplement PMSA
  target/arm: Make RVBAR available for all ARMv8 CPUs
  target/arm: Make stage_2_format for cache attributes optional
  target/arm: Add ARMCacheAttrs to the signature of pmsav8_mpu_lookup
  target/arm: Enable TTBCR_EAE for ARMv8-R AArch32
  target/arm: Add PMSAv8r registers
  target/arm: Add PMSAv8r functionality
  target/arm: Add ARM Cortex-R52 cpu

 target/arm/cpu.c          |   6 +-
 target/arm/cpu.h          |  11 ++
 target/arm/cpu_tcg.c      |  42 +++++++
 target/arm/debug_helper.c |   3 +-
 target/arm/helper.c       | 223 +++++++++++++++++++++++++++++++++++---
 target/arm/internals.h    |  16 +--
 target/arm/m_helper.c     |   3 +-
 target/arm/ptw.c          | 191 +++++++++++++++++++++++++++-----
 target/arm/tlb_helper.c   |   3 +-
 9 files changed, 444 insertions(+), 54 deletions(-)

-- 
2.25.1