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[PATCH 0/2] target/riscv: improvements to GDB target descriptions
From: |
Andrew Burgess |
Subject: |
[PATCH 0/2] target/riscv: improvements to GDB target descriptions |
Date: |
Wed, 31 Aug 2022 09:41:21 +0100 |
I was running some GDB tests against QEMU, and noticed some oddities
with the target description QEMU sends, the following two patches
address these issues.
Thanks,
Andrew
---
Andrew Burgess (2):
target/riscv: remove fflags, frm, and fcsr from riscv-*-fpu.xml
target/riscv: remove fixed numbering from GDB xml feature files
gdb-xml/riscv-32bit-cpu.xml | 6 +-----
gdb-xml/riscv-32bit-fpu.xml | 10 +---------
gdb-xml/riscv-64bit-cpu.xml | 6 +-----
gdb-xml/riscv-64bit-fpu.xml | 10 +---------
target/riscv/gdbstub.c | 32 ++------------------------------
5 files changed, 6 insertions(+), 58 deletions(-)
--
2.25.4
- [PATCH 0/2] target/riscv: improvements to GDB target descriptions,
Andrew Burgess <=