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[PULL 43/53] hw/mem/cxl_type3: Improve error handling in realize()
From: |
Michael S. Tsirkin |
Subject: |
[PULL 43/53] hw/mem/cxl_type3: Improve error handling in realize() |
Date: |
Thu, 2 Mar 2023 03:26:43 -0500 |
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
msix_init_exclusive_bar() can fail, so if it does cleanup the address space.
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Gregory Price <gregory.price@memverge.com>
Tested-by: Gregory Price <gregory.price@memverge.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230206172816.8201-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/mem/cxl_type3.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index dae4fd89ca..252822bd82 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -401,7 +401,7 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
MemoryRegion *mr = ®s->component_registers;
uint8_t *pci_conf = pci_dev->config;
unsigned short msix_num = 1;
- int i;
+ int i, rc;
if (!cxl_setup_memory(ct3d, errp)) {
return;
@@ -438,7 +438,10 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
&ct3d->cxl_dstate.device_registers);
/* MSI(-X) Initailization */
- msix_init_exclusive_bar(pci_dev, msix_num, 4, NULL);
+ rc = msix_init_exclusive_bar(pci_dev, msix_num, 4, NULL);
+ if (rc) {
+ goto err_address_space_free;
+ }
for (i = 0; i < msix_num; i++) {
msix_vector_use(pci_dev, i);
}
@@ -450,6 +453,11 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
cxl_cstate->cdat.free_cdat_table = ct3_free_cdat_table;
cxl_cstate->cdat.private = ct3d;
cxl_doe_cdat_init(cxl_cstate, errp);
+ return;
+
+err_address_space_free:
+ address_space_destroy(&ct3d->hostmem_as);
+ return;
}
static void ct3_exit(PCIDevice *pci_dev)
--
MST
- [PULL 34/53] hw/pci: Trace IRQ routing on PCI topology, (continued)
- [PULL 34/53] hw/pci: Trace IRQ routing on PCI topology, Michael S. Tsirkin, 2023/03/02
- [PULL 33/53] libvhost-user: check for NULL when allocating a virtqueue element, Michael S. Tsirkin, 2023/03/02
- [PULL 30/53] pcie: introduce pcie_sltctl_powered_off() helper, Michael S. Tsirkin, 2023/03/02
- [PULL 35/53] chardev/char-socket: set s->listener = NULL in char_socket_finalize, Michael S. Tsirkin, 2023/03/02
- [PULL 38/53] intel-iommu: fail DEVIOTLB_UNMAP without dt mode, Michael S. Tsirkin, 2023/03/02
- [PULL 39/53] memory: introduce memory_region_unmap_iommu_notifier_range(), Michael S. Tsirkin, 2023/03/02
- [PULL 37/53] intel-iommu: fail MAP notifier without caching mode, Michael S. Tsirkin, 2023/03/02
- [PULL 42/53] MAINTAINERS: Add Fan Ni as Compute eXpress Link QEMU reviewer, Michael S. Tsirkin, 2023/03/02
- [PULL 43/53] hw/mem/cxl_type3: Improve error handling in realize(),
Michael S. Tsirkin <=
- [PULL 48/53] hw/i386/acpi: Drop duplicate _UID entry for CXL root bridge, Michael S. Tsirkin, 2023/03/02
- [PULL 50/53] qemu/bswap: Add const_le64(), Michael S. Tsirkin, 2023/03/02
- [PULL 40/53] smmu: switch to use memory_region_unmap_iommu_notifier_range(), Michael S. Tsirkin, 2023/03/02
- [PULL 41/53] intel-iommu: send UNMAP notifications for domain or global inv desc, Michael S. Tsirkin, 2023/03/02
- [PULL 46/53] hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition, Michael S. Tsirkin, 2023/03/02
- [PULL 44/53] hw/pci-bridge/cxl_downstream: Fix type naming mismatch, Michael S. Tsirkin, 2023/03/02
- [PULL 36/53] memory: Optimize replay of guest mapping, Michael S. Tsirkin, 2023/03/02
- [PULL 45/53] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL, Michael S. Tsirkin, 2023/03/02
- [PULL 47/53] tests/acpi: Allow update of q35/DSDT.cxl, Michael S. Tsirkin, 2023/03/02
- [PULL 49/53] tests: acpi: Update q35/DSDT.cxl for removed duplicate UID, Michael S. Tsirkin, 2023/03/02