[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v8 05/23] hw/isa/piix3: Create power management controller in hos
From: |
Bernhard Beschow |
Subject: |
[PATCH v8 05/23] hw/isa/piix3: Create power management controller in host device |
Date: |
Thu, 2 Mar 2023 22:21:43 +0100 |
The power management controller is an integral part of PIIX3 (function
3). So create it as part of the south bridge.
Note that the ACPI function is optional in QEMU. This is why it gets
object_initialize_child()'ed in realize rather than in instance_init.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221022150508.26830-14-shentey@gmail.com>
---
include/hw/southbridge/piix.h | 6 ++++++
hw/i386/pc_piix.c | 24 ++++++++++++++----------
hw/isa/piix3.c | 14 ++++++++++++++
hw/isa/Kconfig | 1 +
4 files changed, 35 insertions(+), 10 deletions(-)
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index 7b9819ece5..6e6b519dce 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -14,6 +14,7 @@
#include "hw/pci/pci_device.h"
#include "qom/object.h"
+#include "hw/acpi/piix4.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/usb/hcd-uhci.h"
@@ -56,6 +57,9 @@ struct PIIXState {
MC146818RtcState rtc;
UHCIState uhci;
+ PIIX4PMState pm;
+
+ uint32_t smb_io_base;
/* Reset Control Register contents */
uint8_t rcr;
@@ -63,7 +67,9 @@ struct PIIXState {
/* IO memory region for Reset Control Register (PIIX_RCR_IOPORT) */
MemoryRegion rcr_mem;
+ bool has_acpi;
bool has_usb;
+ bool smm_enabled;
};
typedef struct PIIXState PIIX3State;
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 3a6a54bf50..0295336d80 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -47,12 +47,12 @@
#include "sysemu/kvm.h"
#include "hw/kvm/clock.h"
#include "hw/sysbus.h"
+#include "hw/i2c/i2c.h"
#include "hw/i2c/smbus_eeprom.h"
#include "hw/xen/xen-x86.h"
#include "hw/xen/xen.h"
#include "exec/memory.h"
#include "hw/acpi/acpi.h"
-#include "hw/acpi/piix4.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "sysemu/xen.h"
@@ -98,6 +98,7 @@ static void pc_init1(MachineState *machine,
MemoryRegion *system_io = get_system_io();
PCIBus *pci_bus;
ISABus *isa_bus;
+ Object *piix4_pm;
int piix3_devfn = -1;
qemu_irq smi_irq;
GSIState *gsi_state;
@@ -238,15 +239,25 @@ static void pc_init1(MachineState *machine,
pci_dev = pci_new_multifunction(-1, true, type);
object_property_set_bool(OBJECT(pci_dev), "has-usb",
machine_usb(machine), &error_abort);
+ object_property_set_bool(OBJECT(pci_dev), "has-acpi",
+ x86_machine_is_acpi_enabled(x86ms),
+ &error_abort);
+ qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100);
+ object_property_set_bool(OBJECT(pci_dev), "smm-enabled",
+ x86_machine_is_smm_enabled(x86ms),
+ &error_abort);
pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
+
piix3 = PIIX3_PCI_DEVICE(pci_dev);
piix3->pic = x86ms->gsi;
piix3_devfn = piix3->dev.devfn;
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
"rtc"));
+ piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
} else {
pci_bus = NULL;
+ piix4_pm = NULL;
isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
&error_abort);
@@ -316,15 +327,8 @@ static void pc_init1(MachineState *machine,
}
#endif
- if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) {
- PCIDevice *piix4_pm;
-
+ if (piix4_pm) {
smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
- piix4_pm = pci_new(piix3_devfn + 3, TYPE_PIIX4_PM);
- qdev_prop_set_uint32(DEVICE(piix4_pm), "smb_io_base", 0xb100);
- qdev_prop_set_bit(DEVICE(piix4_pm), "smm-enabled",
- x86_machine_is_smm_enabled(x86ms));
- pci_realize_and_unref(piix4_pm, pci_bus, &error_fatal);
qdev_connect_gpio_out(DEVICE(piix4_pm), 0, x86ms->gsi[9]);
qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq);
@@ -338,7 +342,7 @@ static void pc_init1(MachineState *machine,
object_property_allow_set_link,
OBJ_PROP_LINK_STRONG);
object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
- OBJECT(piix4_pm), &error_abort);
+ piix4_pm, &error_abort);
}
if (machine->nvdimms_state->is_enabled) {
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 7ae031f2c5..27bd4dbf65 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -319,6 +319,17 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
return;
}
}
+
+ /* Power Management */
+ if (d->has_acpi) {
+ object_initialize_child(OBJECT(d), "pm", &d->pm, TYPE_PIIX4_PM);
+ qdev_prop_set_int32(DEVICE(&d->pm), "addr", dev->devfn + 3);
+ qdev_prop_set_uint32(DEVICE(&d->pm), "smb_io_base", d->smb_io_base);
+ qdev_prop_set_bit(DEVICE(&d->pm), "smm-enabled", d->smm_enabled);
+ if (!qdev_realize(DEVICE(&d->pm), BUS(pci_bus), errp)) {
+ return;
+ }
+ }
}
static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
@@ -350,7 +361,10 @@ static void pci_piix3_init(Object *obj)
}
static Property pci_piix3_props[] = {
+ DEFINE_PROP_UINT32("smb_io_base", PIIX3State, smb_io_base, 0),
+ DEFINE_PROP_BOOL("has-acpi", PIIX3State, has_acpi, true),
DEFINE_PROP_BOOL("has-usb", PIIX3State, has_usb, true),
+ DEFINE_PROP_BOOL("smm-enabled", PIIX3State, smm_enabled, false),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index f01bc0dff3..cf79580384 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -33,6 +33,7 @@ config PC87312
config PIIX3
bool
+ select ACPI_PIIX4
select I8257
select ISA_BUS
select MC146818RTC
--
2.39.2
- [PATCH v8 00/23] Consolidate PIIX south bridges, Bernhard Beschow, 2023/03/02
- [PATCH v8 01/23] hw/i386/pc: Create RTC controllers in south bridges, Bernhard Beschow, 2023/03/02
- [PATCH v8 02/23] hw/i386/pc: No need for rtc_state to be an out-parameter, Bernhard Beschow, 2023/03/02
- [PATCH v8 04/23] hw/isa/piix3: Create USB controller in host device, Bernhard Beschow, 2023/03/02
- [PATCH v8 03/23] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge, Bernhard Beschow, 2023/03/02
- [PATCH v8 05/23] hw/isa/piix3: Create power management controller in host device,
Bernhard Beschow <=
- [PATCH v8 06/23] hw/isa/piix3: Move ISA bus IRQ assignments into host device, Bernhard Beschow, 2023/03/02
- [PATCH v8 07/23] hw/isa/piix3: Create IDE controller in host device, Bernhard Beschow, 2023/03/02
- [PATCH v8 08/23] hw/isa/piix3: Wire up ACPI interrupt internally, Bernhard Beschow, 2023/03/02
- [PATCH v8 09/23] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS, Bernhard Beschow, 2023/03/02
- [PATCH v8 11/23] hw/isa/piix3: Rename piix3_reset() for sharing with PIIX4, Bernhard Beschow, 2023/03/02
- [PATCH v8 12/23] hw/isa/piix3: Drop the "3" from PIIX base class, Bernhard Beschow, 2023/03/02
- [PATCH v8 10/23] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4, Bernhard Beschow, 2023/03/02
- [PATCH v8 14/23] hw/isa/piix4: Remove unused inbound ISA interrupt lines, Bernhard Beschow, 2023/03/02
- [PATCH v8 16/23] hw/isa/piix4: Create the "intr" property during init() already, Bernhard Beschow, 2023/03/02
- [PATCH v8 17/23] hw/isa/piix4: Rename reset control operations to match PIIX3, Bernhard Beschow, 2023/03/02