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[PATCH v2 0/6] target/i386: Support new Intel platform Instructions in C


From: Tao Su
Subject: [PATCH v2 0/6] target/i386: Support new Intel platform Instructions in CPUID enumeration
Date: Fri, 3 Mar 2023 14:59:07 +0800

Intel platforms Granite Rapids/Sierra Forest introduce below new
instructions and CPUID leaves:

 - CMPccXADD CPUID.(EAX=7,ECX=1):EAX[bit 7]
 - AMX-FP16 CPUID.(EAX=7,ECX=1):EAX[bit 21]
 - AVX-IFMA CPUID.(EAX=7,ECX=1):EAX[bit 23]
 - AVX-VNNI-INT8 CPUID.(EAX=7,ECX=1):EDX[bit 4]
 - AVX-NE-CONVERT CPUID.(EAX=7,ECX=1):EDX[bit 5]
 - PREFETCHITI CPUID.(EAX=7,ECX=1):EDX[bit 14]

Details can be found in recent Intel ISE (Instruction Set Extensions)[1].

KVM part of advertising these CPUID bits have been already in Linux
mainline from commit(6a19d7aa5821) to commit(29c46979b25d). This series
adds the counterpart in QEMU to allow these features exposed to guest.

[1] Intel ISE: https://cdrdv2.intel.com/v1/dl/getContent/671368

---

Changelog:

v2:
 - Rebase to latest QEMU.
 - Improve changelog.
v1:
 - 
https://lore.kernel.org/all/20221208071917.1923093-1-jiaxi.chen@linux.intel.com/

Jiaxi Chen (6):
  target/i386: Add support for CMPCCXADD in CPUID enumeration
  target/i386: Add support for AMX-FP16 in CPUID enumeration
  target/i386: Add support for AVX-IFMA in CPUID enumeration
  target/i386: Add support for AVX-VNNI-INT8 in CPUID enumeration
  target/i386: Add support for AVX-NE-CONVERT in CPUID enumeration
  target/i386: Add support for PREFETCHIT0/1 in CPUID enumeration

 target/i386/cpu.c | 26 +++++++++++++++++++++++---
 target/i386/cpu.h | 14 ++++++++++++++
 2 files changed, 37 insertions(+), 3 deletions(-)


base-commit: 627634031092e1514f363fd8659a579398de0f0e
-- 
2.34.1




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