Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init

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Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init_ioport(

From:	BALATON Zoltan
Subject:	Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init_ioport()
Date:	Fri, 3 Mar 2023 15:59:26 +0100 (CET)

On Fri, 3 Mar 2023, David Woodhouse wrote:

Would like to see a report with tracing from pic_update_irq, the CPUinterrupt "handler" and the intermediate IRQ handler. With theintermediate present and without it. To compare the two.


Here it is witout revert when it hangs after printing:

0.536| Memory used before SYS_Init: 9MB
0.606|
0.606|
0.606| ABox 1.30 (2.7.2018) © 1999-2022 by Ralph Schmidt, Emmanuel Lesueur, 
Teemu Suikki, Harry Sintonen
1.257| PCI ATA/ATAPI Driver@2: PIO Mode 4
1.257| PCI ATA/ATAPI Driver@2: UDMA Mode 5

U pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
D pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
M pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
A pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
M pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
o pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
d pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
e pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0
5 pic_update_irq master 1 imr 248 irr 7 padd 0
  pic_update_irq master 1 imr 248 irr 7 padd 0

pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0

pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
[more of the above repeating some more then]
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 16 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 144 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 144 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 0 imr 45 irr 144 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0
pic_update_irq master 1 imr 248 irr 7 padd 0

and there seems to be no more interrupts
with the revert when it boots this should print:

1.513| PCI ATA/ATAPI Driver@2: PIO Mode 4
1.514| PCI ATA/ATAPI Driver@2: UDMA Mode 5
1.517| ide.device@2: QEMU     QEMU DVD-ROM     <CDROM>
1.523| ide.device@2:  CDRom <CD001>,<MORPHOS > found, bootable
1.525| ide.device@2:  Mount <CD0>
1.526| ide.device@2:  Partition <CD0> DosType 0x43444653 BootPri 127

and the trace including the irq forwarder func in vt82c686 isa:

M via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
o via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
d via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
e via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
5 via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0

 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0

 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
pic_update_irq master 0 imr 45 irr 128 padd 0
pic_update_irq master 1 imr 248 irr 4 padd 1

 via_isa_request_i8259_irq: irq=0 level=1
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
pic_update_irq master 0 imr 45 irr 128 padd 0
pic_update_irq master 1 imr 248 irr 4 padd 1
 via_isa_request_i8259_irq: irq=0 level=1
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
pic_update_irq master 0 imr 45 irr 128 padd 0
pic_update_irq master 1 imr 248 irr 4 padd 1
 via_isa_request_i8259_irq: irq=0 level=1
pic_update_irq master 0 imr 45 irr 128 padd 0
pic_update_irq master 1 imr 248 irr 4 padd 1
 via_isa_request_i8259_irq: irq=0 level=1
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
1 via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
. via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
2 via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
8 via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
2 via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
| via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
i via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
d via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
e via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
. via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
d via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
e via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
v via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
i via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
c via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
e via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
@ via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
2 via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
: via_isa_request_i8259_irq: irq=0 level=0
[...]
< via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
C via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
D via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
R via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
O via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0
M via_isa_request_i8259_irq: irq=0 level=0
  via_isa_request_i8259_irq: irq=0 level=0

via_isa_request_i8259_irq: irq=0 level=0

  via_isa_request_i8259_irq: irq=0 level=0

 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0

 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
pic_update_irq master 0 imr 45 irr 128 padd 0
pic_update_irq master 1 imr 248 irr 4 padd 1
 via_isa_request_i8259_irq: irq=0 level=1
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
pic_update_irq master 0 imr 45 irr 128 padd 0
pic_update_irq master 1 imr 248 irr 4 padd 1
 via_isa_request_i8259_irq: irq=0 level=1
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
pic_update_irq master 0 imr 45 irr 128 padd 0
pic_update_irq master 1 imr 248 irr 4 padd 1
 via_isa_request_i8259_irq: irq=0 level=1
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0
pic_update_irq master 0 imr 45 irr 128 padd 0
pic_update_irq master 1 imr 248 irr 4 padd 1
 via_isa_request_i8259_irq: irq=0 level=1
pic_update_irq master 0 imr 45 irr 128 padd 0
pic_update_irq master 1 imr 248 irr 4 padd 1
 via_isa_request_i8259_irq: irq=0 level=1
 via_isa_request_i8259_irq: irq=0 level=0
 via_isa_request_i8259_irq: irq=0 level=0

and so on. Neither of the above had your ltim patch applied yet.

Regards,
BALATON Zoltan

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[PATCH v3 16/18] hw/isa/piix: Batch register QOM types using DEFINE_TYPES() macro, (continued)
- [PATCH v3 16/18] hw/isa/piix: Batch register QOM types using DEFINE_TYPES() macro, Philippe Mathieu-Daudé, 2023/03/02
- [PATCH v3 17/18] hw/isa/piix: Unify QOM type name of PIIX ISA function, Philippe Mathieu-Daudé, 2023/03/02
- [PATCH v3 18/18] hw/isa/piix: Unify PIIX-ISA QOM type names using qdev aliases, Philippe Mathieu-Daudé, 2023/03/02
- Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init_ioport(), Michael S. Tsirkin, 2023/03/02
- Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init_ioport(), David Woodhouse, 2023/03/03
  - Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init_ioport(), Mark Cave-Ayland, 2023/03/03
    - Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init_ioport(), Philippe Mathieu-Daudé, 2023/03/03
    - Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init_ioport(), BALATON Zoltan, 2023/03/03
    - Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init_ioport(), Bernhard Beschow, 2023/03/04
  - Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init_ioport(), BALATON Zoltan, 2023/03/03
  - Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init_ioport(), BALATON Zoltan <=

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