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[PULL 50/84] target/riscv: Drop ftemp_new
From: |
Richard Henderson |
Subject: |
[PULL 50/84] target/riscv: Drop ftemp_new |
Date: |
Sun, 5 Mar 2023 16:39:20 -0800 |
Translators are no longer required to free tcg temporaries,
therefore there's no need to record temps for later freeing.
Replace the few uses with tcg_temp_new_i64.
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/translate.c | 24 ++++--------------------
1 file changed, 4 insertions(+), 20 deletions(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index a8d516ca3e..7ed625a36f 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -106,9 +106,6 @@ typedef struct DisasContext {
TCGv zero;
/* Space for 3 operands plus 1 extra for address computation. */
TCGv temp[4];
- /* Space for 4 operands(1 dest and <=3 src) for float point computation */
- TCGv_i64 ftemp[4];
- uint8_t nftemp;
/* PointerMasking extension */
bool pm_mask_enabled;
bool pm_base_enabled;
@@ -431,12 +428,6 @@ static void gen_set_gpr128(DisasContext *ctx, int reg_num,
TCGv rl, TCGv rh)
}
}
-static TCGv_i64 ftemp_new(DisasContext *ctx)
-{
- assert(ctx->nftemp < ARRAY_SIZE(ctx->ftemp));
- return ctx->ftemp[ctx->nftemp++] = tcg_temp_new_i64();
-}
-
static TCGv_i64 get_fpr_hs(DisasContext *ctx, int reg_num)
{
if (!ctx->cfg_ptr->ext_zfinx) {
@@ -450,7 +441,7 @@ static TCGv_i64 get_fpr_hs(DisasContext *ctx, int reg_num)
case MXL_RV32:
#ifdef TARGET_RISCV32
{
- TCGv_i64 t = ftemp_new(ctx);
+ TCGv_i64 t = tcg_temp_new_i64();
tcg_gen_ext_i32_i64(t, cpu_gpr[reg_num]);
return t;
}
@@ -476,7 +467,7 @@ static TCGv_i64 get_fpr_d(DisasContext *ctx, int reg_num)
switch (get_xl(ctx)) {
case MXL_RV32:
{
- TCGv_i64 t = ftemp_new(ctx);
+ TCGv_i64 t = tcg_temp_new_i64();
tcg_gen_concat_tl_i64(t, cpu_gpr[reg_num], cpu_gpr[reg_num + 1]);
return t;
}
@@ -496,12 +487,12 @@ static TCGv_i64 dest_fpr(DisasContext *ctx, int reg_num)
}
if (reg_num == 0) {
- return ftemp_new(ctx);
+ return tcg_temp_new_i64();
}
switch (get_xl(ctx)) {
case MXL_RV32:
- return ftemp_new(ctx);
+ return tcg_temp_new_i64();
#ifdef TARGET_RISCV64
case MXL_RV64:
return cpu_gpr[reg_num];
@@ -1208,8 +1199,6 @@ static void riscv_tr_init_disas_context(DisasContextBase
*dcbase, CPUState *cs)
ctx->cs = cs;
ctx->ntemp = 0;
memset(ctx->temp, 0, sizeof(ctx->temp));
- ctx->nftemp = 0;
- memset(ctx->ftemp, 0, sizeof(ctx->ftemp));
ctx->pm_mask_enabled = FIELD_EX32(tb_flags, TB_FLAGS, PM_MASK_ENABLED);
ctx->pm_base_enabled = FIELD_EX32(tb_flags, TB_FLAGS, PM_BASE_ENABLED);
ctx->itrigger = FIELD_EX32(tb_flags, TB_FLAGS, ITRIGGER);
@@ -1245,11 +1234,6 @@ static void riscv_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu)
ctx->temp[i] = NULL;
}
ctx->ntemp = 0;
- for (i = ctx->nftemp - 1; i >= 0; --i) {
- tcg_temp_free_i64(ctx->ftemp[i]);
- ctx->ftemp[i] = NULL;
- }
- ctx->nftemp = 0;
/* Only the first insn within a TB is allowed to cross a page boundary. */
if (ctx->base.is_jmp == DISAS_NEXT) {
--
2.34.1
- [PULL 52/84] target/riscv: Drop tcg_temp_free, (continued)
- [PULL 52/84] target/riscv: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 60/84] target/xtensa: Drop reset_sar_tracker, Richard Henderson, 2023/03/05
- [PULL 55/84] target/sparc: Drop get_temp_tl, Richard Henderson, 2023/03/05
- [PULL 59/84] target/sparc: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 63/84] target/mips: Drop tcg_temp_free from mips16e_translate.c.inc, Richard Henderson, 2023/03/05
- [PULL 65/84] target/tricore: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 44/84] target/m68k: Drop free_cond, Richard Henderson, 2023/03/05
- [PULL 43/84] target/m68k: Drop mark_to_release, Richard Henderson, 2023/03/05
- [PULL 47/84] target/nios2: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 51/84] target/riscv: Drop temp_new, Richard Henderson, 2023/03/05
- [PULL 50/84] target/riscv: Drop ftemp_new,
Richard Henderson <=
- [PULL 49/84] target/ppc: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 54/84] target/sh4: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 45/84] target/m68k: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 40/84] target/hppa: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 61/84] target/xtensa: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 62/84] target/i386: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 69/84] target/hexagon: Use tcg_constant_* for gen_constant_from_imm, Richard Henderson, 2023/03/05
- [PULL 68/84] docs/devel/tcg-ops: Drop recommendation to free temps, Richard Henderson, 2023/03/05
- [PULL 72/84] target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred, Richard Henderson, 2023/03/05
- [PULL 46/84] target/microblaze: Drop tcg_temp_free, Richard Henderson, 2023/03/05