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Re: [PATCH v2] target/arm: Add Neoverse-N1 registers
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH v2] target/arm: Add Neoverse-N1 registers |
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Date: |
Mon, 6 Mar 2023 15:37:01 +0000 |
On Mon, 6 Mar 2023 at 15:12, Chen Baozi <chenbaozi@phytium.com.cn> wrote:
>
> Add implementation defined registers for neoverse-n1 which
> would be accessed by TF-A. Since there is no DSU in Qemu,
> CPUCFR_EL1.SCU bit is set to 1 to avoid DSU registers definition.
>
> Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
> Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Did Marcin test this version of the patch ?
thanks
-- PMM