Re: [PATCH v3] target/arm: Add Neoverse-N1 registers

[Richard Henderson]

On 3/6/23 18:29, Richard Henderson wrote:
> On 3/6/23 18:14, Chen Baozi wrote:
> > Add implementation defined registers for neoverse-n1 which
> > would be accessed by TF-A. Since there is no DSU in Qemu,
> > CPUCFR_EL1.SCU bit is set to 1 to avoid DSU registers definition.
> >
> > Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
> > Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
> > ---
> >   target/arm/cpu64.c     |  2 ++
> >   target/arm/cpu_tcg.c   | 66 ++++++++++++++++++++++++++++++++++++++++++
> >   target/arm/internals.h |  2 ++
> >   3 files changed, 70 insertions(+)
>
> You really need to base on upstream master, as these files have moved.

I beg your pardon, my mistake.  Only half of the patch set which moves these files was 
applied.  I had to do my own rebase around file movement today, but these three are not 
yet affected.

But do be aware that there is a potential conflict out there.

My comments re the placement of the array still apply.


r~