qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v4 3/6] bswap: Add the ability to store to an unaligned 24 bi


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH v4 3/6] bswap: Add the ability to store to an unaligned 24 bit field
Date: Tue, 14 Mar 2023 07:13:03 +0100
User-agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.8.0

On 3/3/23 16:09, Jonathan Cameron wrote:
From: Ira Weiny <ira.weiny@intel.com>

CXL has 24 bit unaligned fields which need to be stored to.  CXL is
specified as little endian.

Define st24_le_p() and the supporting functions to store such a field
from a 32 bit host native value.

The use of b, w, l, q as the size specifier is limiting.  So "24" was
used for the size part of the function name.

Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

---
v8:
   - Picked up tag from Fan Ni.
---
  include/qemu/bswap.h | 23 +++++++++++++++++++++++
  1 file changed, 23 insertions(+)

diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index 15a78c0db5..ee71cbeaaa 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -8,11 +8,23 @@
  #undef  bswap64
  #define bswap64(_x) __builtin_bswap64(_x)
+static inline uint32_t bswap24(uint32_t x)
+{

Could it be safer to add:

       assert(x & 0xff000000U == 0);

...

+    return (((x & 0x000000ffU) << 16) |
+            ((x & 0x0000ff00U) <<  0) |
+            ((x & 0x00ff0000U) >> 16));
+}
+
  static inline void bswap16s(uint16_t *s)
  {
      *s = __builtin_bswap16(*s);
  }
+static inline void bswap24s(uint32_t *s)
+{
+    *s = bswap24(*s);

... and here use:

       *s = bswap24(*s & 0x00ffffffU);

?

+}
+
  static inline void bswap32s(uint32_t *s)
  {
      *s = __builtin_bswap32(*s);
@@ -176,6 +188,7 @@ CPU_CONVERT(le, 64, uint64_t)
   * size is:
   *   b: 8 bits
   *   w: 16 bits
+ *   24: 24 bits

Following the pattern, shouldn't this be 's' for sēsquiword?

Regardless you need to update the doc in docs/devel/loads-stores.rst.

   *   l: 32 bits
   *   q: 64 bits
   *
@@ -248,6 +261,11 @@ static inline void stw_he_p(void *ptr, uint16_t v)
      __builtin_memcpy(ptr, &v, sizeof(v));
  }
+static inline void st24_he_p(void *ptr, uint32_t v)
+{
+    __builtin_memcpy(ptr, &v, 3);
+}
+
  static inline int ldl_he_p(const void *ptr)
  {
      int32_t r;
@@ -297,6 +315,11 @@ static inline void stw_le_p(void *ptr, uint16_t v)
      stw_he_p(ptr, le_bswap(v, 16));
  }
+static inline void st24_le_p(void *ptr, uint32_t v)
+{
+    st24_he_p(ptr, le_bswap(v, 24));
+}



reply via email to

[Prev in Thread] Current Thread [Next in Thread]