Re: [RFC PATCH v2 03/11] hw/arm/smmuv3: Refactor stage-1 PTW

[Mostafa Saleh]

Hi Eric,

On Fri, Mar 17, 2023 at 07:31:06PM +0100, Eric Auger wrote:
> > +#define SMMU_LEVELS                         4
> > +
> > +#define SMMU_STRIDE(gran)                   ((gran) - SMMU_LEVELS + 1)
> > +#define SMMU_BIT_LVL(isz, strd, lvl)        ((isz) - (strd) * \
> > +                                             (SMMU_LEVELS - (lvl)))
> > +#define SMMU_IDXMSK(isz, strd, lvl)         ((1ULL << \
> > +                                             SMMU_BIT_LVL(isz, strd, lvl)) 
> > - 1)
> This looks good to me. Just a question about the BIT_LVL and IDXMSK
> defines. Do they correspond to any documented pseudocode functions
> documented somewhere in the ARM ARM?

I see they are not implemented as functions in ARM ARM, but as part of
aarch64/translation/vmsa_addrcalc/AArch64.TTBaseAddress:
        constant integer FINAL_LEVEL = 3;
        levels = FINAL_LEVEL - startlevel;
        tsize = (iasize - (levels*stride + granulebits)) + 3;
        tablebase = Align(tablebase, 1 << tsize);

This gives the same result, however the equations are a bit different as
they use final level(3), while we use number of levels(4).


Thanks,
Mostafa