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[PULL 07/24] target/s390x: Fix EXECUTE of relative long instructions
From: |
Thomas Huth |
Subject: |
[PULL 07/24] target/s390x: Fix EXECUTE of relative long instructions |
Date: |
Mon, 20 Mar 2023 14:03:13 +0100 |
From: Ilya Leoshkevich <iii@linux.ibm.com>
The code uses the wrong base for relative addressing: it should use the
target instruction address and not the EXECUTE's address.
Fix by storing the target instruction address in the new CPUS390XState
member and loading it from the code generated by gen_ri2().
Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20230316210751.302423-2-iii@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
target/s390x/cpu.h | 1 +
target/s390x/tcg/mem_helper.c | 1 +
target/s390x/tcg/translate.c | 13 ++++++++++++-
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 16f6354751..82c2f575bb 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -87,6 +87,7 @@ struct CPUArchState {
uint64_t cc_vr;
uint64_t ex_value;
+ uint64_t ex_target;
uint64_t __excp_addr;
uint64_t psa;
diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c
index 6835c26dda..00afae2b64 100644
--- a/target/s390x/tcg/mem_helper.c
+++ b/target/s390x/tcg/mem_helper.c
@@ -2530,6 +2530,7 @@ void HELPER(ex)(CPUS390XState *env, uint32_t ilen,
uint64_t r1, uint64_t addr)
that ex_value is non-zero, which flags that we are in a state
that requires such execution. */
env->ex_value = insn | ilen;
+ env->ex_target = addr;
}
uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src,
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 6758d9f47a..a6d81ed16b 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -5769,7 +5769,18 @@ static void in2_a2(DisasContext *s, DisasOps *o)
static TCGv gen_ri2(DisasContext *s)
{
- return tcg_constant_i64(s->base.pc_next + (int64_t)get_field(s, i2) * 2);
+ int64_t delta = (int64_t)get_field(s, i2) * 2;
+ TCGv ri2;
+
+ if (unlikely(s->ex_value)) {
+ ri2 = tcg_temp_new_i64();
+ tcg_gen_ld_i64(ri2, cpu_env, offsetof(CPUS390XState, ex_target));
+ tcg_gen_addi_i64(ri2, ri2, delta);
+ } else {
+ ri2 = tcg_constant_i64(s->base.pc_next + delta);
+ }
+
+ return ri2;
}
static void in2_ri2(DisasContext *s, DisasOps *o)
--
2.31.1
- [PULL 00/24] s390x and misc patches for 8.0-rc1, Thomas Huth, 2023/03/20
- [PULL 05/24] target/s390x: Fix R[NOX]SBG with T=1, Thomas Huth, 2023/03/20
- [PULL 04/24] tests/tcg/s390x: Add PSW modification tests, Thomas Huth, 2023/03/20
- [PULL 01/24] MAINTAINERS: Mark the Nios II CPU as orphan, Thomas Huth, 2023/03/20
- [PULL 07/24] target/s390x: Fix EXECUTE of relative long instructions,
Thomas Huth <=
- [PULL 06/24] tests/tcg/s390x: Add rxsbg.c, Thomas Huth, 2023/03/20
- [PULL 09/24] target/s390x: Handle branching to odd addresses, Thomas Huth, 2023/03/20
- [PULL 08/24] tests/tcg/s390x: Add ex-relative-long.c, Thomas Huth, 2023/03/20
- [PULL 10/24] target/s390x: Handle EXECUTE of odd addresses, Thomas Huth, 2023/03/20
- [PULL 13/24] target/s390x: Handle LLGFRL from non-aligned addresses, Thomas Huth, 2023/03/20
- [PULL 11/24] target/s390x: Handle LGRL from non-aligned addresses, Thomas Huth, 2023/03/20
- [PULL 12/24] target/s390x: Handle LRL and LGFRL from non-aligned addresses, Thomas Huth, 2023/03/20
- [PULL 15/24] target/s390x: Handle CGRL and CLGRL with non-aligned addresses, Thomas Huth, 2023/03/20
- [PULL 02/24] target/s390x: Fix LPSW, Thomas Huth, 2023/03/20
- [PULL 14/24] target/s390x: Handle CRL and CGFRL with non-aligned addresses, Thomas Huth, 2023/03/20