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From: | Philippe Mathieu-Daudé |
Subject: | Re: [PATCH] linux-user/mips: Low down switchable NaN2008 requirement |
Date: | Tue, 21 Mar 2023 17:14:23 +0100 |
User-agent: | Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 |
On 21/3/23 10:23, Jiaxun Yang wrote:
2023年3月15日 08:18,Philippe Mathieu-Daudé <philmd@linaro.org> 写道: On 11/3/23 13:39, Jiaxun Yang wrote:2023年3月9日 12:32,Philippe Mathieu-Daudé <philmd@linaro.org> 写道: On 11/2/23 18:34, Jiaxun Yang wrote:Previously switchable NaN2008 requires fcsr31.nan2008 to be writable for guest. However as per MIPS arch spec this bit can never be writable. This cause NaN2008 ELF to be rejected by QEMU. NaN2008 can be enabled on R2~R5 processors, just make it available unconditionally. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- linux-user/mips/cpu_loop.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index d5c1c7941d..b5c2ca4a3e 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -301,8 +301,7 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) } if (((info->elf_flags & EF_MIPS_NAN2008) != 0) != ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0)) { - if ((env->active_fpu.fcr31_rw_bitmask & - (1 << FCR31_NAN2008)) == 0) { + if (!(env->insn_flags & ISA_MIPS_R2)) { fprintf(stderr, "ELF binary's NaN mode not supported by CPU\n"); exit(1); }Looking at R6.06 revision history: 5.03 August 21, 2013 • ABS2008 and NAN2008 fields of Table 5.7 “FCSR RegisterField Descriptions” were optional in release 3 and could be R/W, but as of release 5 are required, read-only, and preset by hardware.
Well that’s because there is no CPU being marked as MIPS Release 3 in QEMU, and only P5600 is marked as MIPS Release 5. In reality R3 implementations are all advertising themself as R2, and later RCs of microAptiv and interaptiv can all be configured as NaN2008 only. So for those CPUs we have binary compiled with -march=mips32r2 -mnan=2008. Given that default CPU of mips32r2 in QEMU is 24Kf, I think the best approach to deal with such situation is to allow NaN2008 to be enabled for early processors for linux-user. There is a NAN2008 Debian port for test: http://repo.oss.cipunited.com/mipsel-nan2008/tarball/sid-mipsel-nan2008-20230309-1.tar.xz$ qemu-mipsel -L sid-mipsel-nan2008-20230313-1/usr -cpu P5600 usr/bin/uname -ms Linux mips What about something like:That would lost capability of testing NaN2008 binaries again other CPU models.
Why? cpu_get_model() is just a hint, see linux-user/main.c::main(): if (cpu_model == NULL) { cpu_model = cpu_get_model(get_elf_eflags(execfd)); }
-- >8 -- --- a/linux-user/mips/target_elf.h +++ b/linux-user/mips/target_elf.h @@ -15,6 +15,9 @@ static inline const char *cpu_get_model(uint32_t eflags) if ((eflags & EF_MIPS_MACH) == EF_MIPS_MACH_5900) { return "R5900"; } + if (eflags & EF_MIPS_NAN2008) { + return "P5600"; + } return "24Kf"; } #endif ---
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