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[PATCH v6 23/25] target/riscv: Merge checks for reserved pte flags
From: |
Richard Henderson |
Subject: |
[PATCH v6 23/25] target/riscv: Merge checks for reserved pte flags |
Date: |
Sat, 25 Mar 2023 03:54:27 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/cpu_helper.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 850817edfd..82a7c5f9dd 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -976,14 +976,14 @@ restart:
/* Reserved without Svpbmt. */
return TRANSLATE_FAIL;
}
- if ((pte & (PTE_R | PTE_W | PTE_X)) == PTE_W) {
- /* Reserved leaf PTE flags: PTE_W */
- return TRANSLATE_FAIL;
- }
- if ((pte & (PTE_R | PTE_W | PTE_X)) == (PTE_W | PTE_X)) {
- /* Reserved leaf PTE flags: PTE_W + PTE_X */
+
+ /* Check for reserved combinations of RWX flags. */
+ switch (pte & (PTE_R | PTE_W | PTE_X)) {
+ case PTE_W:
+ case PTE_W | PTE_X:
return TRANSLATE_FAIL;
}
+
if ((pte & PTE_U) &&
((mode != PRV_U) && (!sum || access_type == MMU_INST_FETCH))) {
/*
--
2.34.1
- Re: [PATCH v6 07/25] target/riscv: Reduce overhead of MSTATUS_SUM change, (continued)
- [PATCH v6 15/25] target/riscv: Move hstatus.spvp check to check_access_hlsv, Richard Henderson, 2023/03/25
- [PATCH v6 01/25] target/riscv: Extract virt enabled state from tb flags, Richard Henderson, 2023/03/25
- [PATCH v6 16/25] target/riscv: Set MMU_2STAGE_BIT in riscv_cpu_mmu_index, Richard Henderson, 2023/03/25
- [PATCH v6 02/25] target/riscv: Add a general status enum for extensions, Richard Henderson, 2023/03/25
- [PATCH v6 03/25] target/riscv: Encode the FS and VS on a normal way for tb flags, Richard Henderson, 2023/03/25
- [PATCH v6 06/25] target/riscv: Separate priv from mmu_idx, Richard Henderson, 2023/03/25
- [PATCH v6 18/25] target/riscv: Hoist second stage mode change to callers, Richard Henderson, 2023/03/25
- [PATCH v6 23/25] target/riscv: Merge checks for reserved pte flags,
Richard Henderson <=
- [PATCH v6 04/25] target/riscv: Remove mstatus_hs_{fs, vs} from tb_flags, Richard Henderson, 2023/03/25
- [PATCH v6 17/25] target/riscv: Check SUM in the correct register, Richard Henderson, 2023/03/25
- [PATCH v6 21/25] target/riscv: Suppress pte update with is_debug, Richard Henderson, 2023/03/25
- [PATCH v6 25/25] target/riscv: Reorg sum check in get_physical_address, Richard Henderson, 2023/03/25
- [PATCH v6 20/25] target/riscv: Move leaf pte processing out of level loop, Richard Henderson, 2023/03/25
- Re: [PATCH v6 00/25] target/riscv: MSTATUS_SUM + cleanups, Richard Henderson, 2023/03/26
- Re: [PATCH v6 00/25] target/riscv: MSTATUS_SUM + cleanups, liweiwei, 2023/03/26