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[PULL 07/12] igb: add ICR_RXDW
From: |
Jason Wang |
Subject: |
[PULL 07/12] igb: add ICR_RXDW |
Date: |
Tue, 28 Mar 2023 13:19:12 +0800 |
From: Sriram Yagnaraman <sriram.yagnaraman@est.tech>
IGB uses RXDW ICR bit to indicate that rx descriptor has been written
back. This is the same as RXT0 bit in older HW.
Signed-off-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech>
Signed-off-by: Jason Wang <jasowang@redhat.com>
---
hw/net/e1000x_regs.h | 4 ++++
hw/net/igb_core.c | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/net/e1000x_regs.h b/hw/net/e1000x_regs.h
index c0832fa..6d3c4c6 100644
--- a/hw/net/e1000x_regs.h
+++ b/hw/net/e1000x_regs.h
@@ -335,6 +335,7 @@
#define E1000_ICR_RXDMT0 0x00000010 /* rx desc min. threshold (0) */
#define E1000_ICR_RXO 0x00000040 /* rx overrun */
#define E1000_ICR_RXT0 0x00000080 /* rx timer intr (ring 0) */
+#define E1000_ICR_RXDW 0x00000080 /* rx desc written back */
#define E1000_ICR_MDAC 0x00000200 /* MDIO access complete */
#define E1000_ICR_RXCFG 0x00000400 /* RX /c/ ordered set */
#define E1000_ICR_GPI_EN0 0x00000800 /* GP Int 0 */
@@ -378,6 +379,7 @@
#define E1000_ICS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */
#define E1000_ICS_RXO E1000_ICR_RXO /* rx overrun */
#define E1000_ICS_RXT0 E1000_ICR_RXT0 /* rx timer intr */
+#define E1000_ICS_RXDW E1000_ICR_RXDW /* rx desc written back */
#define E1000_ICS_MDAC E1000_ICR_MDAC /* MDIO access complete */
#define E1000_ICS_RXCFG E1000_ICR_RXCFG /* RX /c/ ordered set */
#define E1000_ICS_GPI_EN0 E1000_ICR_GPI_EN0 /* GP Int 0 */
@@ -407,6 +409,7 @@
#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */
#define E1000_IMS_RXO E1000_ICR_RXO /* rx overrun */
#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* rx timer intr */
+#define E1000_IMS_RXDW E1000_ICR_RXDW /* rx desc written back */
#define E1000_IMS_MDAC E1000_ICR_MDAC /* MDIO access complete */
#define E1000_IMS_RXCFG E1000_ICR_RXCFG /* RX /c/ ordered set */
#define E1000_IMS_GPI_EN0 E1000_ICR_GPI_EN0 /* GP Int 0 */
@@ -441,6 +444,7 @@
#define E1000_IMC_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */
#define E1000_IMC_RXO E1000_ICR_RXO /* rx overrun */
#define E1000_IMC_RXT0 E1000_ICR_RXT0 /* rx timer intr */
+#define E1000_IMC_RXDW E1000_ICR_RXDW /* rx desc written back */
#define E1000_IMC_MDAC E1000_ICR_MDAC /* MDIO access complete */
#define E1000_IMC_RXCFG E1000_ICR_RXCFG /* RX /c/ ordered set */
#define E1000_IMC_GPI_EN0 E1000_ICR_GPI_EN0 /* GP Int 0 */
diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c
index 6ba9696..9ab90e8 100644
--- a/hw/net/igb_core.c
+++ b/hw/net/igb_core.c
@@ -1583,7 +1583,7 @@ igb_receive_internal(IGBCore *core, const struct iovec
*iov, int iovcnt,
continue;
}
- n |= E1000_ICR_RXT0;
+ n |= E1000_ICR_RXDW;
igb_rx_fix_l4_csum(core, core->rx_pkt);
igb_write_packet_to_guest(core, core->rx_pkt, &rxr, &rss_info);
--
2.7.4
- [PULL 00/12] Net patches, Jason Wang, 2023/03/28
- [PULL 01/12] igb: Save more Tx states, Jason Wang, 2023/03/28
- [PULL 05/12] MAINTAINERS: Add Sriram Yagnaraman as a igb reviewer, Jason Wang, 2023/03/28
- [PULL 06/12] igb: handle PF/VF reset properly, Jason Wang, 2023/03/28
- [PULL 07/12] igb: add ICR_RXDW,
Jason Wang <=
- [PULL 02/12] igb: Fix DMA requester specification for Tx packet, Jason Wang, 2023/03/28
- [PULL 04/12] hw/net/net_tx_pkt: Align l3_hdr, Jason Wang, 2023/03/28
- [PULL 03/12] hw/net/net_tx_pkt: Ignore ECN bit, Jason Wang, 2023/03/28
- [PULL 08/12] igb: implement VFRE and VFTE registers, Jason Wang, 2023/03/28
- [PULL 09/12] igb: check oversized packets for VMDq, Jason Wang, 2023/03/28
- [PULL 10/12] igb: respect E1000_VMOLR_RSSE, Jason Wang, 2023/03/28
- [PULL 11/12] igb: implement VF Tx and Rx stats, Jason Wang, 2023/03/28
- [PULL 12/12] igb: respect VMVIR and VMOLR for VLAN, Jason Wang, 2023/03/28
- Re: [PULL 00/12] Net patches, Peter Maydell, 2023/03/28