+static void tpm_tis_i2c_test_basic(const void *data)
+{
+ uint8_t access;
+ uint32_t v;
+
+ /*
+ * All register accesses below must work without locality 0 being the
+ * active locality. Therefore, ensure access is released.
+ */
+ tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS,
+ TPM_TIS_ACCESS_ACTIVE_LOCALITY);
+ access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);
+ g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |
+ TPM_TIS_ACCESS_TPM_ESTABLISHMENT);
+
+ /* read interrupt capability -- none are supported */
+ v = tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_CAPABILITY);
+ g_assert_cmpint(v, ==, 0);
+
+ /* try to enable all interrupts */
+ tpm_tis_i2c_writel(0, TPM_I2C_REG_INT_ENABLE, 0xffffffff);
+ v = tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_ENABLE);
+ /* none could be enabled */
+ g_assert_cmpint(v, ==, 0);
+
+ /* enable csum */
+ tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, TPM_DATA_CSUM_ENABLED);
+ /* check csum enable register has bit 0 set */
+ v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
+ g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);
+ /* reading it as 32bit register returns same result */
+ v = tpm_tis_i2c_readl(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
+ g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);
+
+ /* disable csum */
+ tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, 0);
+ /* check csum enable register has bit 0 clear */
+ v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);
+ g_assert_cmpint(v, ==, 0);
+
+ /* write to unsupported register '1' */
+ tpm_tis_i2c_writel(0, 1, 0x12345678);
+ v = tpm_tis_i2c_readl(0, 1);
+ g_assert_cmpint(v, ==, 0xffffffff);
+}