[PATCH RESEND v2 0/3] target/riscv: add missing named features

[Daniel Henrique Barboza]

Hi,

In this version I fixed the problems caused in bios-table-test qtest by
patches 1 and 2. 

A small change was also made in patch 1 to avoid spamming "Disabling
sdtrig due to priv spec version" warnings when running vendor CPUs
with priv spec < 1.12.

Patches based on alistair/riscv-to-apply.next. 


Changes from v1:
- patch 1:
  - skip the warning and disable of 'sdtrig' for CPUs that have priv
    version < 1.12
  - update bios-table-test
- patch 2:
  - update bios-table-test
- v1 link: 
https://lore.kernel.org/qemu-riscv/20250529202315.1684198-1-dbarboza@ventanamicro.com/


Daniel Henrique Barboza (3):
  target/riscv/cpu.c: add 'sdtrig' in riscv,isa
  target/riscv/cpu.c: add 'ssstrict' to riscv,isa
  target/riscv/cpu.c: do better with 'named features' doc

 target/riscv/cpu.c                |  16 ++++++++++++++--
 target/riscv/tcg/tcg-cpu.c        |   9 +++++++++
 tests/data/acpi/riscv64/virt/RHCT | Bin 400 -> 416 bytes
 3 files changed, 23 insertions(+), 2 deletions(-)

-- 
2.49.0